[Mesa-dev] [PATCH] R600/SI: allow 4 more input SGPRs to a shader

[Christian König]

Ah! Didn't took streamout into account, than that makes indeed sense.

On the other hand every SGPR load at shader start means quite a penalty, 
so we should try to avoid loading so many of them. We sooner or later 
probably need a more dynamical allocation  for them.

Christian.

Am 26.04.2014 16:12, schrieb Marek Olšák:
> No, the user SGPRs are within the limit, but there are other SGPRs
> loaded by the hardware. For example, streamout needs up to 6 SGPRs but
> none of them are "user". This patch is actually correct, because it
> allows 16 user SGPRs and 6 non-user SGPRs.
>
> Marek
>
> On Sat, Apr 26, 2014 at 4:06 PM, Christian König
> <deathsimple at vodafone.de> wrote:
>> That won't work correctly, the hardware can only load a maximum of 16 user
>> SGPRs at shader initialization. If we need more we need to pass the data
>> through an extra buffer or something like that.
>>
>> Christian.
>>
>> Am 26.04.2014 15:37, schrieb Marek Olšák:
>>> Sorry, the subject should say "5 more input SGPRs".
>>>
>>> Marek
>>>
>>> On Sat, Apr 26, 2014 at 3:36 PM, Marek Olšák <maraeo at gmail.com> wrote:
>>>> From: Marek Olšák <marek.olsak at amd.com>
>>>>
>>>> Mesa needs one more SGPR, let's add 5 then, because it's a recurring
>>>> issue.
>>>>
>>>> This is silly. Why cannot Mesa specify the calling convention?
>>>> Now I have to break transform feedback to support ARB_draw_indirect until
>>>> this patch is released. Or I'll have to wait until the release and then
>>>> merge ARB_draw_indirect support.
>>>>
>>>> Signed-off-by: Marek Olšák <marek.olsak at amd.com>
>>>> ---
>>>>    lib/Target/R600/AMDGPUCallingConv.td | 2 +-
>>>>    1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> diff --git a/lib/Target/R600/AMDGPUCallingConv.td
>>>> b/lib/Target/R600/AMDGPUCallingConv.td
>>>> index 65cdb24..5f8ad8c 100644
>>>> --- a/lib/Target/R600/AMDGPUCallingConv.td
>>>> +++ b/lib/Target/R600/AMDGPUCallingConv.td
>>>> @@ -20,7 +20,7 @@ def CC_SI : CallingConv<[
>>>>      CCIfInReg<CCIfType<[f32, i32] , CCAssignToReg<[
>>>>        SGPR0, SGPR1, SGPR2, SGPR3, SGPR4, SGPR5, SGPR6, SGPR7,
>>>>        SGPR8, SGPR9, SGPR10, SGPR11, SGPR12, SGPR13, SGPR14, SGPR15,
>>>> -    SGPR16
>>>> +    SGPR16, SGPR17, SGPR18, SGPR19, SGPR20, SGPR21
>>>>      ]>>>,
>>>>
>>>>      CCIfInReg<CCIfType<[i64] , CCAssignToRegWithShadow<
>>>> --
>>>> 1.8.3.2
>>>>
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