[Mesa-dev] [PATCH 11/11] i965: Get rid of backend_instruction::sampler
Chris Forbes
chrisf at ijw.co.nz
Mon Aug 4 01:58:54 PDT 2014
The generators no longer use this.
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
---
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 1 -
src/mesa/drivers/dri/i965/brw_fs.cpp | 1 -
src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 1 -
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 1 -
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 3 ---
src/mesa/drivers/dri/i965/brw_shader.h | 1 -
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 3 ---
7 files changed, 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
index 7d4b327..6fc1e95 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
@@ -83,7 +83,6 @@ brw_blorp_eu_emitter::emit_texture_lookup(const struct brw_reg &dst,
inst->base_mrf = base_mrf;
inst->mlen = msg_length;
- inst->sampler = 0;
inst->header_present = false;
insts.push_tail(inst);
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 0d1185b..15ad035 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -348,7 +348,6 @@ fs_inst::equals(fs_inst *inst) const
conditional_mod == inst->conditional_mod &&
mlen == inst->mlen &&
base_mrf == inst->base_mrf &&
- sampler == inst->sampler &&
target == inst->target &&
eot == inst->eot &&
header_present == inst->header_present &&
diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
index 63d87f9..01790ad 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
@@ -157,7 +157,6 @@ instructions_match(fs_inst *a, fs_inst *b)
a->mlen == b->mlen &&
a->regs_written == b->regs_written &&
a->base_mrf == b->base_mrf &&
- a->sampler == b->sampler &&
a->eot == b->eot &&
a->header_present == b->header_present &&
a->shadow_compare == b->shadow_compare)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
index 35c056f..8d07be2 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
@@ -498,7 +498,6 @@ fs_visitor::emit_fragment_program_code()
inst = emit_texture_gen4(ir, dst, coordinate, shadow_c, lod, dpdy, fpi->TexSrcUnit);
}
- inst->sampler = fpi->TexSrcUnit;
inst->shadow_compare = fpi->TexShadow;
/* Reuse the GLSL swizzle_result() handler. */
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 8a69f25..32d0cb0 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -1769,7 +1769,6 @@ fs_visitor::emit_mcs_fetch(ir_texture *ir, fs_reg coordinate, uint32_t sampler)
inst->regs_written = 4; /* we only care about one reg of response,
* but the sampler always writes 4/8
*/
- inst->sampler = sampler;
return dest;
}
@@ -1891,8 +1890,6 @@ fs_visitor::visit(ir_texture *ir)
if (ir->op == ir_tg4)
inst->texture_offset |= gather_channel(ir, sampler) << 16; // M0.2:16-17
- inst->sampler = sampler;
-
if (ir->shadow_comparitor)
inst->shadow_compare = true;
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 5c48671..5980cf0 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -108,7 +108,6 @@ struct backend_instruction {
uint32_t texture_offset; /**< Texture offset bitfield */
uint32_t offset; /**< spill/unspill offset */
- uint8_t sampler;
uint8_t mlen; /**< SEND message length */
int8_t base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
uint8_t target; /**< MRT target. */
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index ca15bc9..f72dbbe 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -45,7 +45,6 @@ vec4_instruction::vec4_instruction(vec4_visitor *v,
this->no_dd_check = false;
this->writes_accumulator = false;
this->conditional_mod = BRW_CONDITIONAL_NONE;
- this->sampler = 0;
this->texture_offset = 0;
this->target = 0;
this->shadow_compare = false;
@@ -2319,7 +2318,6 @@ vec4_visitor::emit_mcs_fetch(ir_texture *ir, src_reg coordinate, uint32_t sample
vec4_instruction *inst = new(mem_ctx) vec4_instruction(this, SHADER_OPCODE_TXF_MCS);
inst->base_mrf = 2;
inst->mlen = 1;
- inst->sampler = sampler;
inst->dst = dst_reg(this, glsl_type::uvec4_type);
inst->dst.writemask = WRITEMASK_XYZW;
@@ -2471,7 +2469,6 @@ vec4_visitor::visit(ir_texture *ir)
sampler >= 16;
inst->base_mrf = 2;
inst->mlen = inst->header_present + 1; /* always at least one */
- inst->sampler = sampler;
inst->dst = dst_reg(this, ir->type);
inst->dst.writemask = WRITEMASK_XYZW;
inst->shadow_compare = ir->shadow_comparitor != NULL;
--
2.0.2
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