[Mesa-dev] [PATCH v2 02/13] i965: make brw_texture_offset() more generic

[Connor Abbott]

Signed-off-by: Connor Abbott <connor.abbott at intel.com>
---
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp   |  4 +++-
 src/mesa/drivers/dri/i965/brw_shader.cpp       | 13 +++++--------
 src/mesa/drivers/dri/i965/brw_shader.h         |  3 ++-
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp |  4 +++-
 4 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index d25e9aa..18cfb76 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -1865,7 +1865,9 @@ fs_visitor::visit(ir_texture *ir)
    }
 
    if (ir->offset != NULL && ir->op != ir_txf)
-      inst->texture_offset = brw_texture_offset(ctx, ir->offset->as_constant());
+      inst->texture_offset =
+         brw_texture_offset(ctx, ir->offset->as_constant()->value.i,
+                            ir->offset->type->vector_elements);
 
    if (ir->op == ir_tg4)
       inst->texture_offset |= gather_channel(ir, sampler) << 16; // M0.2:16-17
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index f56ea68..09ecfff 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -364,18 +364,15 @@ brw_math_function(enum opcode op)
 }
 
 uint32_t
-brw_texture_offset(struct gl_context *ctx, ir_constant *offset)
+brw_texture_offset(struct gl_context *ctx, int *offsets,
+                   unsigned num_components)
 {
    /* If the driver does not support GL_ARB_gpu_shader5, the offset
     * must be constant.
     */
-   assert(offset != NULL || ctx->Extensions.ARB_gpu_shader5);
+   assert(offsets != NULL || ctx->Extensions.ARB_gpu_shader5);
 
-   if (!offset) return 0;  /* nonconstant offset; caller will handle it. */
-
-   signed char offsets[3];
-   for (unsigned i = 0; i < offset->type->vector_elements; i++)
-      offsets[i] = (signed char) offset->value.i[i];
+   if (!offsets) return 0;  /* nonconstant offset; caller will handle it. */
 
    /* Combine all three offsets into a single unsigned dword:
     *
@@ -384,7 +381,7 @@ brw_texture_offset(struct gl_context *ctx, ir_constant *offset)
     *    bits  3:0 - R Offset (Z component)
     */
    unsigned offset_bits = 0;
-   for (unsigned i = 0; i < offset->type->vector_elements; i++) {
+   for (unsigned i = 0; i < num_components; i++) {
       const unsigned shift = 4 * (2 - i);
       offset_bits |= (offsets[i] << shift) & (0xF << shift);
    }
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 5c48671..de901fa 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -177,7 +177,8 @@ public:
    virtual void invalidate_live_intervals() = 0;
 };
 
-uint32_t brw_texture_offset(struct gl_context *ctx, ir_constant *offset);
+uint32_t brw_texture_offset(struct gl_context *ctx, int *offsets,
+                            unsigned num_components);
 
 #endif /* __cplusplus */
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index e16e93c..48297f6 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -2443,7 +2443,9 @@ vec4_visitor::visit(ir_texture *ir)
    }
 
    if (ir->offset != NULL && ir->op != ir_txf)
-      inst->texture_offset = brw_texture_offset(ctx, ir->offset->as_constant());
+      inst->texture_offset =
+         brw_texture_offset(ctx, ir->offset->as_constant()->value.i,
+                            ir->offset->type->vector_elements);
 
    /* Stuff the channel select bits in the top of the texture offset */
    if (ir->op == ir_tg4)
-- 
1.9.3