[Mesa-dev] [PATCH] i965: Support the allow_glsl_extension_directive_midshader option.

[Ian Romanick]

On 08/08/2014 01:06 AM, Kenneth Graunke wrote:
> This adds support for Marek's new driconf parameter, which avoids
> totally white rendering in Unigine Valley (which attempts to enable
> the GL_ARB_sample_shading extension in an illegal place).
> 
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75664
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>

> ---
>  src/mesa/drivers/dri/i965/brw_context.c  | 3 +++
>  src/mesa/drivers/dri/i965/intel_screen.c | 1 +
>  2 files changed, 4 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
> index 52f2557..402d936 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.c
> +++ b/src/mesa/drivers/dri/i965/brw_context.c
> @@ -570,6 +570,9 @@ brw_process_driconf_options(struct brw_context *brw)
>  
>     ctx->Const.DisableGLSLLineContinuations =
>        driQueryOptionb(options, "disable_glsl_line_continuations");
> +
> +   ctx->Const.AllowGLSLExtensionDirectiveMidShader =
> +      driQueryOptionb(options, "allow_glsl_extension_directive_midshader");
>  }
>  
>  GLboolean
> diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
> index 5ebf1d5..ea0fc58 100644
> --- a/src/mesa/drivers/dri/i965/intel_screen.c
> +++ b/src/mesa/drivers/dri/i965/intel_screen.c
> @@ -84,6 +84,7 @@ DRI_CONF_BEGIN
>        DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
>        DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
>        DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
> +      DRI_CONF_ALLOW_GLSL_EXTENSION_DIRECTIVE_MIDSHADER("false")
>  
>        DRI_CONF_OPT_BEGIN_B(shader_precompile, "true")
>  	 DRI_CONF_DESC(en, "Perform code generation at shader link time.")
>