[Mesa-dev] [PATCH] i965/cse: Don't eliminate instructions with side-effects

[Kenneth Graunke]

On Friday, August 08, 2014 05:05:35 PM Jason Ekstrand wrote:
> On Fri, Aug 8, 2014 at 4:58 PM, Kenneth Graunke wrote:
> > It's also worth noting in your commit message that this is not actually
> > fixing a current bug, but rather preventing a regression once your patches
> > that convert atomics to send-from-GRFs land.
> >
> 
> Perhaps.  Honestly, I'm not sure why CSE isn't causing problems now unless
> it doesn't do CSE on message registers.
> 
> --Jason

CSE should work fine with message registers.

It finds code like:

OPER   m3   src0  src1
...
OPER   m4   src0  src1

and replaces it with:

OPER   tmp  src0  src1
MOV    m3   tmp
...
MOV    m4   tmp

There are no magical side effects to message registers...they're just where you put data you want to send to some unit.  As long as the right data ends up in those registers, it doesn't matter how it gets there.

These days, it can also CSE certain SEND messages, but those are...pull constant loads and texturing (memory reads), pixel interpolator requests (also pure), and shader time adds (which are atomic writes, so it really shouldn't!)

I guess we've been getting lucky with SHADER_OPCODE_SHADER_TIME_ADD since we never emit two shader time adds with the same sources.  (INTEL_DEBUG=shader_time is just a debugging tool.)

--Ken
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