[Mesa-dev] [PATCH 12/12] i965: Implement fast color clears using meta operations
Kristian Høgsberg
krh at bitplanet.net
Mon Aug 11 17:29:42 PDT 2014
This patch uses the infrastructure put in place by previous patches
to implement fast color clears and replicated color clears in terms of
meta operations.
This works all the way back to gen7 where fast clear was introduced and
adds support for fast clear on gen8. It replaces the blorp path
completely and improves on a few cases. Layered clears are now done
using instanced rendering and multiple render-target clears use a
MRT shader with rep16 writes.
Signed-off-by: Kristian Høgsberg <krh at bitplanet.net>
---
src/mesa/drivers/dri/i965/Makefile.sources | 2 +-
src/mesa/drivers/dri/i965/brw_blorp.h | 8 -
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 4 +
src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 620 --------------------
src/mesa/drivers/dri/i965/brw_clear.c | 12 +-
src/mesa/drivers/dri/i965/brw_context.c | 1 +
src/mesa/drivers/dri/i965/brw_context.h | 15 +
src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 718 ++++++++++++++++++++++++
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 +-
src/mesa/drivers/dri/i965/intel_tex_copy.c | 4 +
10 files changed, 750 insertions(+), 638 deletions(-)
delete mode 100644 src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
create mode 100644 src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources
index ee28dd9..88f26b3 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -31,7 +31,6 @@ i965_FILES = \
brw_blorp.cpp \
brw_blorp_blit.cpp \
brw_blorp_blit_eu.cpp \
- brw_blorp_clear.cpp \
brw_cc.c \
brw_cfg.cpp \
brw_clear.c \
@@ -79,6 +78,7 @@ i965_FILES = \
brw_meta_updownsample.c \
brw_meta_stencil_blit.c \
brw_meta_util.c \
+ brw_meta_fast_clear.c \
brw_misc_state.c \
brw_object_purgeable.c \
brw_performance_monitor.c \
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index 419744f..4085785 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -47,14 +47,6 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
float dst_x1, float dst_y1,
GLenum filter, bool mirror_x, bool mirror_y);
-bool
-brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
- GLbitfield mask, bool partial_clear);
-
-void
-brw_blorp_resolve_color(struct brw_context *brw,
- struct intel_mipmap_tree *mt);
-
#ifdef __cplusplus
} /* end extern "C" */
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index dad76f6..d119579 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -308,6 +308,8 @@ brw_blorp_copytexsubimage(struct brw_context *brw,
int dst_slice = slice + dst_image->TexObject->MinLayer + dst_image->Face;
int dst_level = dst_image->Level + dst_image->TexObject->MinLevel;
+ _mesa_unlock_texture(ctx, dst_image->TexObject);
+
brw_blorp_blit_miptrees(brw,
src_mt, src_irb->mt_level, src_irb->mt_layer,
dst_mt, dst_level, dst_slice,
@@ -315,6 +317,8 @@ brw_blorp_copytexsubimage(struct brw_context *brw,
dstX0, dstY0, dstX1, dstY1,
GL_NEAREST, false, mirror_y);
+ _mesa_lock_texture(ctx, dst_image->TexObject);
+
/* If we're copying to a packed depth stencil texture and the source
* framebuffer has separate stencil, we need to also copy the stencil data
* over.
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
deleted file mode 100644
index ffbcd1a..0000000
--- a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
+++ /dev/null
@@ -1,620 +0,0 @@
-/*
- * Copyright © 2013 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-
-extern "C" {
-#include "main/teximage.h"
-#include "main/blend.h"
-#include "main/fbobject.h"
-#include "main/renderbuffer.h"
-}
-
-#include "util/ralloc.h"
-
-#include "intel_fbo.h"
-
-#include "brw_blorp.h"
-#include "brw_context.h"
-#include "brw_eu.h"
-#include "brw_state.h"
-
-#define FILE_DEBUG_FLAG DEBUG_BLORP
-
-struct brw_blorp_const_color_prog_key
-{
- bool use_simd16_replicated_data;
- bool pad[3];
-};
-
-/**
- * Parameters for a blorp operation where the fragment shader outputs a
- * constant color. This is used for both fast color clears and color
- * resolves.
- */
-class brw_blorp_const_color_params : public brw_blorp_params
-{
-public:
- virtual uint32_t get_wm_prog(struct brw_context *brw,
- brw_blorp_prog_data **prog_data) const;
-
- brw_blorp_const_color_prog_key wm_prog_key;
-};
-
-class brw_blorp_clear_params : public brw_blorp_const_color_params
-{
-public:
- brw_blorp_clear_params(struct brw_context *brw,
- struct gl_framebuffer *fb,
- struct gl_renderbuffer *rb,
- GLubyte *color_mask,
- bool partial_clear,
- unsigned layer);
-};
-
-
-/**
- * Parameters for a blorp operation that performs a "render target resolve".
- * This is used to resolve pending fast clear pixels before a color buffer is
- * used for texturing, ReadPixels, or scanout.
- */
-class brw_blorp_rt_resolve_params : public brw_blorp_const_color_params
-{
-public:
- brw_blorp_rt_resolve_params(struct brw_context *brw,
- struct intel_mipmap_tree *mt);
-};
-
-
-class brw_blorp_const_color_program
-{
-public:
- brw_blorp_const_color_program(struct brw_context *brw,
- const brw_blorp_const_color_prog_key *key);
- ~brw_blorp_const_color_program();
-
- const GLuint *compile(struct brw_context *brw, GLuint *program_size);
-
- brw_blorp_prog_data prog_data;
-
-private:
- void alloc_regs();
-
- void *mem_ctx;
- const brw_blorp_const_color_prog_key *key;
- struct brw_compile func;
-
- /* Thread dispatch header */
- struct brw_reg R0;
-
- /* Pixel X/Y coordinates (always in R1). */
- struct brw_reg R1;
-
- /* Register with push constants (a single vec4) */
- struct brw_reg clear_rgba;
-
- /* MRF used for render target writes */
- GLuint base_mrf;
-};
-
-brw_blorp_const_color_program::brw_blorp_const_color_program(
- struct brw_context *brw,
- const brw_blorp_const_color_prog_key *key)
- : mem_ctx(ralloc_context(NULL)),
- key(key),
- R0(),
- R1(),
- clear_rgba(),
- base_mrf(0)
-{
- prog_data.first_curbe_grf = 0;
- prog_data.persample_msaa_dispatch = false;
- brw_init_compile(brw, &func, mem_ctx);
-}
-
-brw_blorp_const_color_program::~brw_blorp_const_color_program()
-{
- ralloc_free(mem_ctx);
-}
-
-
-/**
- * Determine if fast color clear supports the given clear color.
- *
- * Fast color clear can only clear to color values of 1.0 or 0.0. At the
- * moment we only support floating point, unorm, and snorm buffers.
- */
-static bool
-is_color_fast_clear_compatible(struct brw_context *brw,
- mesa_format format,
- const union gl_color_union *color)
-{
- if (_mesa_is_format_integer_color(format))
- return false;
-
- for (int i = 0; i < 4; i++) {
- if (color->f[i] != 0.0 && color->f[i] != 1.0 &&
- _mesa_format_has_color_component(format, i)) {
- return false;
- }
- }
- return true;
-}
-
-
-/**
- * Convert the given color to a bitfield suitable for ORing into DWORD 7 of
- * SURFACE_STATE.
- */
-static uint32_t
-compute_fast_clear_color_bits(const union gl_color_union *color)
-{
- uint32_t bits = 0;
- for (int i = 0; i < 4; i++) {
- if (color->f[i] != 0.0)
- bits |= 1 << (GEN7_SURFACE_CLEAR_COLOR_SHIFT + (3 - i));
- }
- return bits;
-}
-
-
-brw_blorp_clear_params::brw_blorp_clear_params(struct brw_context *brw,
- struct gl_framebuffer *fb,
- struct gl_renderbuffer *rb,
- GLubyte *color_mask,
- bool partial_clear,
- unsigned layer)
-{
- struct gl_context *ctx = &brw->ctx;
- struct intel_renderbuffer *irb = intel_renderbuffer(rb);
-
- dst.set(brw, irb->mt, irb->mt_level, layer, true);
-
- /* Override the surface format according to the context's sRGB rules. */
- mesa_format format = _mesa_get_render_format(ctx, irb->mt->format);
- dst.brw_surfaceformat = brw->render_target_format[format];
-
- x0 = fb->_Xmin;
- x1 = fb->_Xmax;
- if (rb->Name != 0) {
- y0 = fb->_Ymin;
- y1 = fb->_Ymax;
- } else {
- y0 = rb->Height - fb->_Ymax;
- y1 = rb->Height - fb->_Ymin;
- }
-
- float *push_consts = (float *)&wm_push_consts;
-
- push_consts[0] = ctx->Color.ClearColor.f[0];
- push_consts[1] = ctx->Color.ClearColor.f[1];
- push_consts[2] = ctx->Color.ClearColor.f[2];
- push_consts[3] = ctx->Color.ClearColor.f[3];
-
- use_wm_prog = true;
-
- memset(&wm_prog_key, 0, sizeof(wm_prog_key));
-
- wm_prog_key.use_simd16_replicated_data = true;
-
- /* From the SNB PRM (Vol4_Part1):
- *
- * "Replicated data (Message Type = 111) is only supported when
- * accessing tiled memory. Using this Message Type to access linear
- * (untiled) memory is UNDEFINED."
- */
- if (irb->mt->tiling == I915_TILING_NONE)
- wm_prog_key.use_simd16_replicated_data = false;
-
- /* Constant color writes ignore everyting in blend and color calculator
- * state. This is not documented.
- */
- for (int i = 0; i < 4; i++) {
- if (_mesa_format_has_color_component(irb->mt->format, i) &&
- !color_mask[i]) {
- color_write_disable[i] = true;
- wm_prog_key.use_simd16_replicated_data = false;
- }
- }
-
- /* If we can do this as a fast color clear, do so.
- *
- * Note that the condition "!partial_clear" means we only try to do full
- * buffer clears using fast color clear logic. This is necessary because
- * the fast color clear alignment requirements mean that we typically have
- * to clear a larger rectangle than (x0, y0) to (x1, y1). Restricting fast
- * color clears to the full-buffer condition guarantees that the extra
- * memory locations that get written to are outside the image boundary (and
- * hence irrelevant). Note that the rectangle alignment requirements are
- * never larger than the size of a tile, so there is no danger of
- * overflowing beyond the memory belonging to the region.
- */
- if (irb->mt->fast_clear_state != INTEL_FAST_CLEAR_STATE_NO_MCS &&
- !partial_clear && wm_prog_key.use_simd16_replicated_data &&
- is_color_fast_clear_compatible(brw, format, &ctx->Color.ClearColor)) {
- memset(push_consts, 0xff, 4*sizeof(float));
- fast_clear_op = GEN7_FAST_CLEAR_OP_FAST_CLEAR;
-
- /* Figure out what the clear rectangle needs to be aligned to, and how
- * much it needs to be scaled down.
- */
- unsigned x_align, y_align, x_scaledown, y_scaledown;
-
- if (irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE) {
- /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
- * Target(s)", beneath the "Fast Color Clear" bullet (p327):
- *
- * Clear pass must have a clear rectangle that must follow
- * alignment rules in terms of pixels and lines as shown in the
- * table below. Further, the clear-rectangle height and width
- * must be multiple of the following dimensions. If the height
- * and width of the render target being cleared do not meet these
- * requirements, an MCS buffer can be created such that it
- * follows the requirement and covers the RT.
- *
- * The alignment size in the table that follows is related to the
- * alignment size returned by intel_get_non_msrt_mcs_alignment(), but
- * with X alignment multiplied by 16 and Y alignment multiplied by 32.
- */
- intel_get_non_msrt_mcs_alignment(brw, irb->mt, &x_align, &y_align);
- x_align *= 16;
- y_align *= 32;
-
- /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
- * Target(s)", beneath the "Fast Color Clear" bullet (p327):
- *
- * In order to optimize the performance MCS buffer (when bound to
- * 1X RT) clear similarly to MCS buffer clear for MSRT case,
- * clear rect is required to be scaled by the following factors
- * in the horizontal and vertical directions:
- *
- * The X and Y scale down factors in the table that follows are each
- * equal to half the alignment value computed above.
- */
- x_scaledown = x_align / 2;
- y_scaledown = y_align / 2;
-
- /* From BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel
- * Backend > MCS Buffer for Render Target(s) [DevIVB+] > Table "Color
- * Clear of Non-MultiSampled Render Target Restrictions":
- *
- * Clear rectangle must be aligned to two times the number of
- * pixels in the table shown below due to 16x16 hashing across the
- * slice.
- */
- x_align *= 2;
- y_align *= 2;
- } else {
- /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
- * Target(s)", beneath the "MSAA Compression" bullet (p326):
- *
- * Clear pass for this case requires that scaled down primitive
- * is sent down with upper left co-ordinate to coincide with
- * actual rectangle being cleared. For MSAA, clear rectangle’s
- * height and width need to as show in the following table in
- * terms of (width,height) of the RT.
- *
- * MSAA Width of Clear Rect Height of Clear Rect
- * 4X Ceil(1/8*width) Ceil(1/2*height)
- * 8X Ceil(1/2*width) Ceil(1/2*height)
- *
- * The text "with upper left co-ordinate to coincide with actual
- * rectangle being cleared" is a little confusing--it seems to imply
- * that to clear a rectangle from (x,y) to (x+w,y+h), one needs to
- * feed the pipeline using the rectangle (x,y) to
- * (x+Ceil(w/N),y+Ceil(h/2)), where N is either 2 or 8 depending on
- * the number of samples. Experiments indicate that this is not
- * quite correct; actually, what the hardware appears to do is to
- * align whatever rectangle is sent down the pipeline to the nearest
- * multiple of 2x2 blocks, and then scale it up by a factor of N
- * horizontally and 2 vertically. So the resulting alignment is 4
- * vertically and either 4 or 16 horizontally, and the scaledown
- * factor is 2 vertically and either 2 or 8 horizontally.
- */
- switch (irb->mt->num_samples) {
- case 4:
- x_scaledown = 8;
- break;
- case 8:
- x_scaledown = 2;
- break;
- default:
- unreachable("Unexpected sample count for fast clear");
- }
- y_scaledown = 2;
- x_align = x_scaledown * 2;
- y_align = y_scaledown * 2;
- }
-
- /* Do the alignment and scaledown. */
- x0 = ROUND_DOWN_TO(x0, x_align) / x_scaledown;
- y0 = ROUND_DOWN_TO(y0, y_align) / y_scaledown;
- x1 = ALIGN(x1, x_align) / x_scaledown;
- y1 = ALIGN(y1, y_align) / y_scaledown;
- }
-}
-
-
-brw_blorp_rt_resolve_params::brw_blorp_rt_resolve_params(
- struct brw_context *brw,
- struct intel_mipmap_tree *mt)
-{
- dst.set(brw, mt, 0 /* level */, 0 /* layer */, true);
-
- /* From the Ivy Bridge PRM, Vol2 Part1 11.9 "Render Target Resolve":
- *
- * A rectangle primitive must be scaled down by the following factors
- * with respect to render target being resolved.
- *
- * The scaledown factors in the table that follows are related to the
- * alignment size returned by intel_get_non_msrt_mcs_alignment(), but with
- * X and Y alignment each divided by 2.
- */
- unsigned x_align, y_align;
- intel_get_non_msrt_mcs_alignment(brw, mt, &x_align, &y_align);
- unsigned x_scaledown = x_align / 2;
- unsigned y_scaledown = y_align / 2;
- x0 = y0 = 0;
- x1 = ALIGN(mt->logical_width0, x_scaledown) / x_scaledown;
- y1 = ALIGN(mt->logical_height0, y_scaledown) / y_scaledown;
-
- fast_clear_op = GEN7_FAST_CLEAR_OP_RESOLVE;
-
- /* Note: there is no need to initialize push constants because it doesn't
- * matter what data gets dispatched to the render target. However, we must
- * ensure that the fragment shader delivers the data using the "replicated
- * color" message.
- */
- use_wm_prog = true;
- memset(&wm_prog_key, 0, sizeof(wm_prog_key));
- wm_prog_key.use_simd16_replicated_data = true;
-}
-
-
-uint32_t
-brw_blorp_const_color_params::get_wm_prog(struct brw_context *brw,
- brw_blorp_prog_data **prog_data)
- const
-{
- uint32_t prog_offset = 0;
- if (!brw_search_cache(&brw->cache, BRW_BLORP_CONST_COLOR_PROG,
- &this->wm_prog_key, sizeof(this->wm_prog_key),
- &prog_offset, prog_data)) {
- brw_blorp_const_color_program prog(brw, &this->wm_prog_key);
- GLuint program_size;
- const GLuint *program = prog.compile(brw, &program_size);
- brw_upload_cache(&brw->cache, BRW_BLORP_CONST_COLOR_PROG,
- &this->wm_prog_key, sizeof(this->wm_prog_key),
- program, program_size,
- &prog.prog_data, sizeof(prog.prog_data),
- &prog_offset, prog_data);
- }
- return prog_offset;
-}
-
-void
-brw_blorp_const_color_program::alloc_regs()
-{
- int reg = 0;
- this->R0 = retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW);
- this->R1 = retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW);
-
- prog_data.first_curbe_grf = reg;
- clear_rgba = retype(brw_vec4_grf(reg++, 0), BRW_REGISTER_TYPE_F);
- reg += BRW_BLORP_NUM_PUSH_CONST_REGS;
-
- /* Make sure we didn't run out of registers */
- assert(reg <= GEN7_MRF_HACK_START);
-
- this->base_mrf = 2;
-}
-
-const GLuint *
-brw_blorp_const_color_program::compile(struct brw_context *brw,
- GLuint *program_size)
-{
- /* Set up prog_data */
- memset(&prog_data, 0, sizeof(prog_data));
- prog_data.persample_msaa_dispatch = false;
-
- alloc_regs();
-
- brw_set_default_compression_control(&func, BRW_COMPRESSION_NONE);
-
- struct brw_reg mrf_rt_write =
- retype(vec16(brw_message_reg(base_mrf)), BRW_REGISTER_TYPE_F);
-
- uint32_t mlen, msg_type;
- if (key->use_simd16_replicated_data) {
- /* The message payload is a single register with the low 4 floats/ints
- * filled with the constant clear color.
- */
- brw_set_default_mask_control(&func, BRW_MASK_DISABLE);
- brw_MOV(&func, vec4(brw_message_reg(base_mrf)), clear_rgba);
- brw_set_default_mask_control(&func, BRW_MASK_ENABLE);
-
- msg_type = BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED;
- mlen = 1;
- } else {
- for (int i = 0; i < 4; i++) {
- /* The message payload is pairs of registers for 16 pixels each of r,
- * g, b, and a.
- */
- brw_set_default_compression_control(&func, BRW_COMPRESSION_COMPRESSED);
- brw_MOV(&func,
- brw_message_reg(base_mrf + i * 2),
- brw_vec1_grf(clear_rgba.nr, i));
- brw_set_default_compression_control(&func, BRW_COMPRESSION_NONE);
- }
-
- msg_type = BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE;
- mlen = 8;
- }
-
- /* Now write to the render target and terminate the thread */
- brw_fb_WRITE(&func,
- 16 /* dispatch_width */,
- base_mrf /* msg_reg_nr */,
- mrf_rt_write /* src0 */,
- msg_type,
- BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
- mlen,
- 0 /* response_length */,
- true /* eot */,
- false /* header present */);
-
- if (unlikely(INTEL_DEBUG & DEBUG_BLORP)) {
- fprintf(stderr, "Native code for BLORP clear:\n");
- brw_disassemble(brw, func.store, 0, func.next_insn_offset, stderr);
- fprintf(stderr, "\n");
- }
-
- brw_compact_instructions(&func, 0, 0, NULL);
- return brw_get_program(&func, program_size);
-}
-
-
-bool
-do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
- struct gl_renderbuffer *rb, unsigned buf,
- bool partial_clear, unsigned layer)
-{
- struct gl_context *ctx = &brw->ctx;
- struct intel_renderbuffer *irb = intel_renderbuffer(rb);
-
- brw_blorp_clear_params params(brw, fb, rb, ctx->Color.ColorMask[buf],
- partial_clear, layer);
-
- bool is_fast_clear =
- (params.fast_clear_op == GEN7_FAST_CLEAR_OP_FAST_CLEAR);
- if (is_fast_clear) {
- /* Record the clear color in the miptree so that it will be
- * programmed in SURFACE_STATE by later rendering and resolve
- * operations.
- */
- uint32_t new_color_value =
- compute_fast_clear_color_bits(&ctx->Color.ClearColor);
- if (irb->mt->fast_clear_color_value != new_color_value) {
- irb->mt->fast_clear_color_value = new_color_value;
- brw->state.dirty.brw |= BRW_NEW_SURFACES;
- }
-
- /* If the buffer is already in INTEL_FAST_CLEAR_STATE_CLEAR, the clear
- * is redundant and can be skipped.
- */
- if (irb->mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_CLEAR)
- return true;
-
- /* If the MCS buffer hasn't been allocated yet, we need to allocate
- * it now.
- */
- if (!irb->mt->mcs_mt) {
- if (!intel_miptree_alloc_non_msrt_mcs(brw, irb->mt)) {
- /* MCS allocation failed--probably this will only happen in
- * out-of-memory conditions. But in any case, try to recover
- * by falling back to a non-blorp clear technique.
- */
- return false;
- }
- brw->state.dirty.brw |= BRW_NEW_SURFACES;
- }
- }
-
- const char *clear_type;
- if (is_fast_clear)
- clear_type = "fast";
- else if (params.wm_prog_key.use_simd16_replicated_data)
- clear_type = "replicated";
- else
- clear_type = "slow";
-
- DBG("%s (%s) to mt %p level %d layer %d\n", __FUNCTION__, clear_type,
- irb->mt, irb->mt_level, irb->mt_layer);
-
- brw_blorp_exec(brw, ¶ms);
-
- if (is_fast_clear) {
- /* Now that the fast clear has occurred, put the buffer in
- * INTEL_FAST_CLEAR_STATE_CLEAR so that we won't waste time doing
- * redundant clears.
- */
- irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_CLEAR;
- }
-
- return true;
-}
-
-
-extern "C" {
-bool
-brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
- GLbitfield mask, bool partial_clear)
-{
- for (unsigned buf = 0; buf < fb->_NumColorDrawBuffers; buf++) {
- struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[buf];
- struct intel_renderbuffer *irb = intel_renderbuffer(rb);
-
- /* Only clear the buffers present in the provided mask */
- if (((1 << fb->_ColorDrawBufferIndexes[buf]) & mask) == 0)
- continue;
-
- /* If this is an ES2 context or GL_ARB_ES2_compatibility is supported,
- * the framebuffer can be complete with some attachments missing. In
- * this case the _ColorDrawBuffers pointer will be NULL.
- */
- if (rb == NULL)
- continue;
-
- if (fb->MaxNumLayers > 0) {
- unsigned layer_multiplier =
- (irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_UMS ||
- irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS) ?
- irb->mt->num_samples : 1;
- unsigned num_layers = irb->layer_count;
- for (unsigned layer = 0; layer < num_layers; layer++) {
- if (!do_single_blorp_clear(brw, fb, rb, buf, partial_clear,
- irb->mt_layer + layer * layer_multiplier)) {
- return false;
- }
- }
- } else {
- unsigned layer = irb->mt_layer;
- if (!do_single_blorp_clear(brw, fb, rb, buf, partial_clear, layer))
- return false;
- }
-
- irb->need_downsample = true;
- }
-
- return true;
-}
-
-void
-brw_blorp_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt)
-{
- DBG("%s to mt %p\n", __FUNCTION__, mt);
-
- brw_blorp_rt_resolve_params params(brw, mt);
- brw_blorp_exec(brw, ¶ms);
- mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_RESOLVED;
-}
-
-} /* extern "C" */
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c
index a1c1d01..0e5fef5 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -241,13 +241,11 @@ brw_clear(struct gl_context *ctx, GLbitfield mask)
}
}
- /* BLORP is currently only supported on Gen6+. */
- if (brw->gen >= 6 && brw->gen < 8) {
- if (mask & BUFFER_BITS_COLOR) {
- if (brw_blorp_clear_color(brw, fb, mask, partial_clear)) {
- debug_mask("blorp color", mask & BUFFER_BITS_COLOR);
- mask &= ~BUFFER_BITS_COLOR;
- }
+ /* Clear color buffers with fast clear or at least rep16 writes. */
+ if (brw->gen >= 6 && mask & BUFFER_BITS_COLOR) {
+ if (brw_meta_fast_clear(brw, fb, mask, partial_clear)) {
+ debug_mask("blorp color", mask & BUFFER_BITS_COLOR);
+ mask &= ~BUFFER_BITS_COLOR;
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 4eb30a1..90e1e87 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -829,6 +829,7 @@ intelDestroyContext(__DRIcontext * driContextPriv)
}
_mesa_meta_free(&brw->ctx);
+ brw_meta_fast_clear_free(brw);
if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
/* Force a report. */
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index c4bb4dc..51bd081 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1358,6 +1358,8 @@ struct brw_context
double report_time;
} shader_time;
+ struct brw_fast_clear_state *fast_clear_state;
+
__DRIcontext *driContext;
struct intel_screen *intelScreen;
};
@@ -1421,6 +1423,19 @@ void brw_meta_fbo_stencil_blit(struct brw_context *brw,
void brw_meta_stencil_updownsample(struct brw_context *brw,
struct intel_mipmap_tree *src,
struct intel_mipmap_tree *dst);
+
+bool brw_meta_fast_clear(struct brw_context *brw,
+ struct gl_framebuffer *fb,
+ GLbitfield mask,
+ bool partial_clear);
+
+void
+brw_meta_resolve_color(struct brw_context *brw,
+ struct intel_mipmap_tree *mt);
+void
+brw_meta_fast_clear_free(struct brw_context *brw);
+
+
/*======================================================================
* brw_misc_state.c
*/
diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
new file mode 100644
index 0000000..ed98818
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
@@ -0,0 +1,718 @@
+/*
+ * Copyright © 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/context.h"
+#include "main/objectlabel.h"
+#include "main/shaderapi.h"
+#include "main/arrayobj.h"
+#include "main/bufferobj.h"
+#include "main/buffers.h"
+#include "main/blend.h"
+#include "main/enable.h"
+#include "main/depth.h"
+#include "main/stencil.h"
+#include "main/varray.h"
+#include "main/uniforms.h"
+#include "main/fbobject.h"
+#include "main/texobj.h"
+
+#include "main/api_validate.h"
+#include "main/state.h"
+
+#include "vbo/vbo_context.h"
+
+#include "drivers/common/meta.h"
+
+#include "brw_defines.h"
+#include "brw_context.h"
+#include "brw_draw.h"
+#include "intel_fbo.h"
+#include "intel_batchbuffer.h"
+
+#include "brw_blorp.h"
+
+struct brw_fast_clear_state {
+ GLuint vao;
+ GLuint vbo;
+ GLuint shader_prog;
+ GLint color_location;
+};
+
+static bool
+brw_fast_clear_init(struct brw_context *brw)
+{
+ struct brw_fast_clear_state *clear;
+
+ if (brw->fast_clear_state) {
+ clear = brw->fast_clear_state;
+ _mesa_BindVertexArray(clear->vao);
+ _mesa_BindBuffer(GL_ARRAY_BUFFER, clear->vbo);
+ return true;
+ }
+
+ brw->fast_clear_state = clear = malloc(sizeof *clear);
+ if (clear == NULL)
+ return false;
+
+ memset(clear, 0, sizeof *clear);
+ _mesa_GenVertexArrays(1, &clear->vao);
+ _mesa_BindVertexArray(clear->vao);
+ _mesa_GenBuffers(1, &clear->vbo);
+ _mesa_BindBuffer(GL_ARRAY_BUFFER, clear->vbo);
+ _mesa_VertexAttribPointer(0, 2, GL_FLOAT, GL_FALSE, sizeof(float) * 2, 0);
+ _mesa_EnableVertexAttribArray(0);
+
+ return true;
+}
+
+static void
+brw_bind_rep_write_shader(struct brw_context *brw, float *color)
+{
+ const char *vs_source =
+ "#extension GL_AMD_vertex_shader_layer : enable\n"
+ "#extension GL_ARB_draw_instanced : enable\n"
+ "attribute vec4 position;\n"
+ "uniform int layer;\n"
+ "void main()\n"
+ "{\n"
+ " gl_Layer = gl_InstanceID;\n"
+ " gl_Position = position;\n"
+ "}\n";
+ const char *fs_source =
+ "uniform vec4 color;\n"
+ "void main()\n"
+ "{\n"
+ " gl_FragColor = color;\n"
+ "}\n";
+
+ GLuint vs, fs;
+ struct brw_fast_clear_state *clear = brw->fast_clear_state;
+ struct gl_context *ctx = &brw->ctx;
+
+ if (clear->shader_prog) {
+ _mesa_UseProgram(clear->shader_prog);
+ _mesa_Uniform4fv(clear->color_location, 1, color);
+ return;
+ }
+
+ vs = _mesa_meta_compile_shader_with_debug(ctx, GL_VERTEX_SHADER, vs_source);
+ fs = _mesa_meta_compile_shader_with_debug(ctx, GL_FRAGMENT_SHADER, fs_source);
+
+ clear->shader_prog = _mesa_CreateProgram();
+ _mesa_AttachShader(clear->shader_prog, fs);
+ _mesa_DeleteShader(fs);
+ _mesa_AttachShader(clear->shader_prog, vs);
+ _mesa_DeleteShader(vs);
+ _mesa_BindAttribLocation(clear->shader_prog, 0, "position");
+ _mesa_ObjectLabel(GL_PROGRAM, clear->shader_prog, -1, "meta clear");
+ _mesa_LinkProgram(clear->shader_prog);
+
+ clear->color_location =
+ _mesa_GetUniformLocation(clear->shader_prog, "color");
+
+ _mesa_UseProgram(clear->shader_prog);
+ _mesa_Uniform4fv(clear->color_location, 1, color);
+}
+
+void
+brw_meta_fast_clear_free(struct brw_context *brw)
+{
+ struct brw_fast_clear_state *clear = brw->fast_clear_state;
+ GET_CURRENT_CONTEXT(old_context);
+
+ if (clear == NULL)
+ return;
+
+ _mesa_make_current(&brw->ctx, NULL, NULL);
+
+ _mesa_DeleteVertexArrays(1, &clear->vao);
+ _mesa_DeleteBuffers(1, &clear->vbo);
+ _mesa_DeleteProgram(clear->shader_prog);
+ free(clear);
+
+ if (old_context)
+ _mesa_make_current(old_context, old_context->WinSysDrawBuffer, old_context->WinSysReadBuffer);
+ else
+ _mesa_make_current(NULL, NULL, NULL);
+}
+
+struct rect {
+ int x0, y0, x1, y1;
+};
+
+static void
+brw_draw_rectlist(struct gl_context *ctx, struct rect *rect, int num_instances)
+{
+ int start = 0, count = 3;
+ struct _mesa_prim prim;
+ float verts[6];
+
+ verts[0] = rect->x1;
+ verts[1] = rect->y1;
+ verts[2] = rect->x0;
+ verts[3] = rect->y1;
+ verts[4] = rect->x0;
+ verts[5] = rect->y0;
+
+ /* upload new vertex data */
+ _mesa_BufferData(GL_ARRAY_BUFFER_ARB, sizeof(verts), verts,
+ GL_DYNAMIC_DRAW_ARB);
+
+ if (ctx->NewState)
+ _mesa_update_state(ctx);
+
+ vbo_bind_arrays(ctx);
+
+ memset(&prim, 0, sizeof prim);
+ prim.begin = 1;
+ prim.end = 1;
+ prim.mode = BRW_PRIM_OFFSET + _3DPRIM_RECTLIST;
+ prim.num_instances = num_instances;
+ prim.start = start;
+ prim.count = count;
+
+ /* Make sure our internal prim value doesn't clash with a valid GL value. */
+ assert(!_mesa_is_valid_prim_mode(ctx, prim.mode));
+
+ brw_draw_prims(ctx, &prim, 1, NULL,
+ GL_TRUE, start, start + count - 1,
+ NULL, NULL);
+}
+
+static void
+get_fast_clear_rect(struct brw_context *brw, struct gl_framebuffer *fb,
+ struct intel_renderbuffer *irb, struct rect *rect)
+{
+ unsigned int x_align, y_align;
+ unsigned int x_scaledown, y_scaledown;
+
+ if (irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE) {
+ /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
+ * Target(s)", beneath the "Fast Color Clear" bullet (p327):
+ *
+ * Clear pass must have a clear rectangle that must follow
+ * alignment rules in terms of pixels and lines as shown in the
+ * table below. Further, the clear-rectangle height and width
+ * must be multiple of the following dimensions. If the height
+ * and width of the render target being cleared do not meet these
+ * requirements, an MCS buffer can be created such that it
+ * follows the requirement and covers the RT.
+ *
+ * The alignment size in the table that follows is related to the
+ * alignment size returned by intel_get_non_msrt_mcs_alignment(), but
+ * with X alignment multiplied by 16 and Y alignment multiplied by 32.
+ */
+ intel_get_non_msrt_mcs_alignment(brw, irb->mt, &x_align, &y_align);
+ x_align *= 16;
+ y_align *= 32;
+
+ /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
+ * Target(s)", beneath the "Fast Color Clear" bullet (p327):
+ *
+ * In order to optimize the performance MCS buffer (when bound to
+ * 1X RT) clear similarly to MCS buffer clear for MSRT case,
+ * clear rect is required to be scaled by the following factors
+ * in the horizontal and vertical directions:
+ *
+ * The X and Y scale down factors in the table that follows are each
+ * equal to half the alignment value computed above.
+ */
+ x_scaledown = x_align / 2;
+ y_scaledown = y_align / 2;
+
+ /* From BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel
+ * Backend > MCS Buffer for Render Target(s) [DevIVB+] > Table "Color
+ * Clear of Non-MultiSampled Render Target Restrictions":
+ *
+ * Clear rectangle must be aligned to two times the number of
+ * pixels in the table shown below due to 16x16 hashing across the
+ * slice.
+ */
+ x_align *= 2;
+ y_align *= 2;
+ } else {
+ /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
+ * Target(s)", beneath the "MSAA Compression" bullet (p326):
+ *
+ * Clear pass for this case requires that scaled down primitive
+ * is sent down with upper left co-ordinate to coincide with
+ * actual rectangle being cleared. For MSAA, clear rectangle’s
+ * height and width need to as show in the following table in
+ * terms of (width,height) of the RT.
+ *
+ * MSAA Width of Clear Rect Height of Clear Rect
+ * 4X Ceil(1/8*width) Ceil(1/2*height)
+ * 8X Ceil(1/2*width) Ceil(1/2*height)
+ *
+ * The text "with upper left co-ordinate to coincide with actual
+ * rectangle being cleared" is a little confusing--it seems to imply
+ * that to clear a rectangle from (x,y) to (x+w,y+h), one needs to
+ * feed the pipeline using the rectangle (x,y) to
+ * (x+Ceil(w/N),y+Ceil(h/2)), where N is either 2 or 8 depending on
+ * the number of samples. Experiments indicate that this is not
+ * quite correct; actually, what the hardware appears to do is to
+ * align whatever rectangle is sent down the pipeline to the nearest
+ * multiple of 2x2 blocks, and then scale it up by a factor of N
+ * horizontally and 2 vertically. So the resulting alignment is 4
+ * vertically and either 4 or 16 horizontally, and the scaledown
+ * factor is 2 vertically and either 2 or 8 horizontally.
+ */
+ switch (irb->mt->num_samples) {
+ case 4:
+ x_scaledown = 8;
+ break;
+ case 8:
+ x_scaledown = 2;
+ break;
+ default:
+ assert(!"Unexpected sample count for fast clear");
+ break;
+ }
+ y_scaledown = 2;
+ x_align = x_scaledown * 2;
+ y_align = y_scaledown * 2;
+ }
+
+ rect->x0 = fb->_Xmin;
+ rect->x1 = fb->_Xmax;
+ if (fb->Name != 0) {
+ rect->y0 = fb->_Ymin;
+ rect->y1 = fb->_Ymax;
+ } else {
+ rect->y0 = fb->Height - fb->_Ymax;
+ rect->y1 = fb->Height - fb->_Ymin;
+ }
+
+ rect->x0 = ROUND_DOWN_TO(rect->x0, x_align) / x_scaledown;
+ rect->y0 = ROUND_DOWN_TO(rect->y0, y_align) / y_scaledown;
+ rect->x1 = ALIGN(rect->x1, x_align) / x_scaledown;
+ rect->y1 = ALIGN(rect->y1, y_align) / y_scaledown;
+}
+
+static void
+get_buffer_rect(struct brw_context *brw, struct gl_framebuffer *fb,
+ struct intel_renderbuffer *irb, struct rect *rect)
+{
+ rect->x0 = fb->_Xmin;
+ rect->x1 = fb->_Xmax;
+ if (fb->Name != 0) {
+ rect->y0 = fb->_Ymin;
+ rect->y1 = fb->_Ymax;
+ } else {
+ rect->y0 = fb->Height - fb->_Ymax;
+ rect->y1 = fb->Height - fb->_Ymin;
+ }
+}
+
+/**
+ * Determine if fast color clear supports the given clear color.
+ *
+ * Fast color clear can only clear to color values of 1.0 or 0.0. At the
+ * moment we only support floating point, unorm, and snorm buffers.
+ */
+static bool
+is_color_fast_clear_compatible(struct brw_context *brw,
+ mesa_format format,
+ const union gl_color_union *color)
+{
+ if (_mesa_is_format_integer_color(format))
+ return false;
+
+ for (int i = 0; i < 4; i++) {
+ if (color->f[i] != 0.0 && color->f[i] != 1.0 &&
+ _mesa_format_has_color_component(format, i)) {
+ return false;
+ }
+ }
+ return true;
+}
+
+/**
+ * Convert the given color to a bitfield suitable for ORing into DWORD 7 of
+ * SURFACE_STATE.
+ */
+static uint32_t
+compute_fast_clear_color_bits(const union gl_color_union *color)
+{
+ uint32_t bits = 0;
+ for (int i = 0; i < 4; i++) {
+ /* Testing for non-0 works for integer and float colors */
+ if (color->f[i] != 0.0)
+ bits |= 1 << (GEN7_SURFACE_CLEAR_COLOR_SHIFT + (3 - i));
+ }
+ return bits;
+}
+
+static const uint32_t fast_clear_color[4] = { ~0, ~0, ~0, ~0 };
+
+static void
+set_fast_clear_op(struct brw_context *brw, uint32_t op)
+{
+ /*
+ * Set op and dirty BRW_NEW_FRAGMENT_PROGRAM to make sure we re-emit
+ * 3DSTATE_PS.
+ */
+ brw->wm.fast_clear_op = op;
+ brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM;
+}
+
+static void
+use_rectlist(struct brw_context *brw, bool enable)
+{
+ /*
+ * Set custom state to let us use _3DPRIM_RECTLIST and the replicated
+ * rendertarget write. When we enable reclist mode, we disable the
+ * viewport transform, disable clipping, enable the rep16 write
+ * optimization and disable simd8 dispatch in the PS.
+ */
+ brw->sf.viewport_transform_enable = !enable;
+ brw->use_rep_send = enable;
+ brw->no_simd8 = enable;
+
+ /*
+ * Dirty state to make sure we reemit the state packages affected by the
+ * custom state. We dirty BRW_NEW_FRAGMENT_PROGRAM to emit 3DSTATE_PS for
+ * disabling simd8 dispatch, _NEW_LIGHT to emit 3DSTATE_SF for disabling
+ * the viewport transform and 3DSTATE_CLIP to disable clipping for the
+ * reclist primitive. This is a little messy - it would be nicer to
+ * BRW_NEW_FAST_CLEAR flag or so, but we're out of brw state bits. Dirty
+ * _NEW_BUFFERS to make sure we emit new SURFACE_STATE with the new fast
+ * clear color value.
+ */
+ brw->state.dirty.mesa |= _NEW_LIGHT | _NEW_BUFFERS;
+ brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM;
+}
+
+bool
+brw_meta_fast_clear(struct brw_context *brw, struct gl_framebuffer *fb,
+ GLbitfield buffers, bool partial_clear)
+{
+ struct gl_context *ctx = &brw->ctx;
+ mesa_format format;
+ enum { FAST_CLEAR, REP_CLEAR, PLAIN_CLEAR } clear_type;
+ GLbitfield plain_clear_buffers, meta_save, rep_clear_buffers, fast_clear_buffers;
+ struct rect fast_clear_rect, clear_rect;
+ int layers;
+
+ fast_clear_buffers = rep_clear_buffers = plain_clear_buffers = 0;
+
+ /*
+ * First we loop through the color draw buffers and determine which ones
+ * can be fast cleared, which ones can use the replicated write and which
+ * ones have to fall back to regular color clear.
+ */
+ for (unsigned buf = 0; buf < fb->_NumColorDrawBuffers; buf++) {
+ struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[buf];
+ struct intel_renderbuffer *irb = intel_renderbuffer(rb);
+ int index = fb->_ColorDrawBufferIndexes[buf];
+
+ /* Only clear the buffers present in the provided mask */
+ if (((1 << index) & buffers) == 0)
+ continue;
+
+ /* If this is an ES2 context or GL_ARB_ES2_compatibility is supported,
+ * the framebuffer can be complete with some attachments missing. In
+ * this case the _ColorDrawBuffers pointer will be NULL.
+ */
+ if (rb == NULL)
+ continue;
+
+ clear_type = FAST_CLEAR;
+
+ /* We don't have fast clear until gen7. */
+ if (brw->gen == 6)
+ clear_type = REP_CLEAR;
+
+ if (irb->mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_NO_MCS)
+ clear_type = REP_CLEAR;
+
+ /*
+ * We can't do scissored fast clears because of the restrictions on the
+ * fast clear rectangle size.
+ */
+ if (partial_clear)
+ clear_type = REP_CLEAR;
+
+ /*
+ * Fast clear is only supported for colors where all components are
+ * either 0 or 1.
+ */
+ format = _mesa_get_render_format(ctx, irb->mt->format);
+ if (!is_color_fast_clear_compatible(brw, format, &ctx->Color.ClearColor))
+ clear_type = REP_CLEAR;
+
+ /* From the SNB PRM (Vol4_Part1):
+ *
+ * "Replicated data (Message Type = 111) is only supported when
+ * accessing tiled memory. Using this Message Type to access
+ * linear (untiled) memory is UNDEFINED."
+ */
+ if (irb->mt->tiling == I915_TILING_NONE) {
+ perf_debug("falling back to plain clear because buffers are untiled\n");
+ clear_type = PLAIN_CLEAR;
+ }
+
+ /* Constant color writes ignore everything in blend and color calculator
+ * state. This is not documented.
+ */
+ GLubyte *color_mask = ctx->Color.ColorMask[buf];
+ for (int i = 0; i < 4; i++) {
+ if (_mesa_format_has_color_component(irb->mt->format, i) &&
+ !color_mask[i]) {
+ perf_debug("falling back to plain clear because of color mask\n");
+ clear_type = PLAIN_CLEAR;
+ }
+ }
+
+ /*
+ * Allocate the MCS for non MSRT surfaces now if we're doing a fast
+ * clear and we don't have the MCS yet. On failure, fall back to
+ * replicated clear.
+ */
+ if (clear_type == FAST_CLEAR && irb->mt->mcs_mt == NULL)
+ if (!intel_miptree_alloc_non_msrt_mcs(brw, irb->mt))
+ clear_type = REP_CLEAR;
+
+ switch (clear_type) {
+ case FAST_CLEAR:
+ irb->mt->fast_clear_color_value =
+ compute_fast_clear_color_bits(&ctx->Color.ClearColor);
+ irb->need_downsample = true;
+
+ /*
+ * If the buffer is already in INTEL_FAST_CLEAR_STATE_CLEAR, the
+ * clear is redundant and can be skipped. Only skip after we've
+ * updated the fast clear color above though.
+ */
+ if (irb->mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_CLEAR)
+ continue;
+
+ /*
+ * Set fast_clear_state to RESOLVED so we don't try resolve them when
+ * we draw, in case the mt is also bound as a texture.
+ */
+ irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_RESOLVED;
+ irb->need_downsample = true;
+ fast_clear_buffers |= 1 << index;
+ get_fast_clear_rect(brw, fb, irb, &fast_clear_rect);
+ break;
+
+ case REP_CLEAR:
+ rep_clear_buffers |= 1 << index;
+ get_buffer_rect(brw, fb, irb, &clear_rect);
+ break;
+
+ case PLAIN_CLEAR:
+ plain_clear_buffers |= 1 << index;
+ get_buffer_rect(brw, fb, irb, &clear_rect);
+ continue;
+ }
+ }
+
+ if (!(fast_clear_buffers | rep_clear_buffers)) {
+ if (plain_clear_buffers)
+ /* If we only have plain clears, skip the meta save/restore. */
+ goto out;
+ else
+ /*
+ * Nothing left to do. This happens when we hit the redundant fast
+ * clear case above and nothing else.
+ */
+ return true;
+ }
+
+ meta_save =
+ MESA_META_ALPHA_TEST |
+ MESA_META_BLEND |
+ MESA_META_DEPTH_TEST |
+ MESA_META_RASTERIZATION |
+ MESA_META_SHADER |
+ MESA_META_STENCIL_TEST |
+ MESA_META_VERTEX |
+ MESA_META_VIEWPORT |
+ MESA_META_CLIP |
+ MESA_META_CLAMP_FRAGMENT_COLOR |
+ MESA_META_MULTISAMPLE |
+ MESA_META_OCCLUSION_QUERY |
+ MESA_META_DRAW_BUFFERS;
+
+ _mesa_meta_begin(ctx, meta_save);
+
+ if (!brw_fast_clear_init(brw)) {
+ /*
+ * This is going to be hard to recover from, most likely out of memory.
+ * Bail and let meta try and (probably) fail for us.
+ */
+ plain_clear_buffers = buffers;
+ goto bail_to_meta;
+ }
+
+ /* Clears never have the color clamped. */
+ if (ctx->Extensions.ARB_color_buffer_float)
+ _mesa_ClampColor(GL_CLAMP_FRAGMENT_COLOR, GL_FALSE);
+
+ _mesa_set_enable(ctx, GL_DEPTH_TEST, GL_FALSE);
+ _mesa_DepthMask(GL_FALSE);
+ _mesa_set_enable(ctx, GL_STENCIL_TEST, GL_FALSE);
+
+ use_rectlist(brw, true);
+
+ layers = MAX2(1, fb->MaxNumLayers);
+ if (fast_clear_buffers) {
+ _mesa_meta_drawbuffers_from_bitfield(fast_clear_buffers);
+ brw_bind_rep_write_shader(brw, (float *) fast_clear_color);
+ set_fast_clear_op(brw, GEN7_PS_RENDER_TARGET_FAST_CLEAR_ENABLE);
+ brw_draw_rectlist(ctx, &fast_clear_rect, layers);
+ set_fast_clear_op(brw, 0);
+ }
+
+ if (rep_clear_buffers) {
+ _mesa_meta_drawbuffers_from_bitfield(rep_clear_buffers);
+ brw_bind_rep_write_shader(brw, ctx->Color.ClearColor.f);
+ brw_draw_rectlist(ctx, &clear_rect, layers);
+ }
+
+ /*
+ * Now set the mts we cleared to INTEL_FAST_CLEAR_STATE_CLEAR so we'll
+ * resolve them eventually.
+ */
+ for (unsigned buf = 0; buf < fb->_NumColorDrawBuffers; buf++) {
+ struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[buf];
+ struct intel_renderbuffer *irb = intel_renderbuffer(rb);
+ int index = fb->_ColorDrawBufferIndexes[buf];
+
+ if ((1 << index) & fast_clear_buffers)
+ irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_CLEAR;
+ }
+
+ bail_to_meta:
+ /*
+ * Dirty _NEW_BUFFERS so we reemit SURFACE_STATE which sets the fast clear
+ * color before resolve and sets irb->mt->fast_clear_state to UNRESOLVED if
+ * we render to it.
+ */
+ brw->state.dirty.mesa |= _NEW_BUFFERS;
+
+
+ /* Set the custom state back to normal and dirty the same bits as above */
+ use_rectlist(brw, false);
+
+ _mesa_meta_end(ctx);
+
+ /* From BSpec: Render Target Fast Clear:
+ *
+ * After Render target fast clear, pipe-control with color cache
+ * write-flush must be issued before sending any DRAW commands on that
+ * render target.
+ */
+ intel_batchbuffer_emit_mi_flush(brw);
+
+ /* If we had to fall back to plain clear for any buffers, clear those now
+ * by calling into meta.
+ */
+ out:
+ if (plain_clear_buffers)
+ _mesa_meta_glsl_Clear(&brw->ctx, plain_clear_buffers);
+
+ return true;
+}
+
+static void
+get_resolve_rect(struct brw_context *brw,
+ struct intel_mipmap_tree *mt, struct rect *rect)
+{
+ unsigned x_align, y_align;
+ unsigned x_scaledown, y_scaledown;
+
+ /* From the Ivy Bridge PRM, Vol2 Part1 11.9 "Render Target Resolve":
+ *
+ * A rectangle primitive must be scaled down by the following factors
+ * with respect to render target being resolved.
+ *
+ * The scaledown factors in the table that follows are related to the
+ * alignment size returned by intel_get_non_msrt_mcs_alignment(), but with
+ * X and Y alignment each divided by 2.
+ */
+
+ intel_get_non_msrt_mcs_alignment(brw, mt, &x_align, &y_align);
+ x_scaledown = x_align / 2;
+ y_scaledown = y_align / 2;
+ rect->x0 = rect->y0 = 0;
+ rect->x1 = ALIGN(mt->logical_width0, x_scaledown) / x_scaledown;
+ rect->y1 = ALIGN(mt->logical_height0, y_scaledown) / y_scaledown;
+}
+
+void
+brw_meta_resolve_color(struct brw_context *brw,
+ struct intel_mipmap_tree *mt)
+{
+ struct gl_context *ctx = &brw->ctx;
+ GLuint fbo, rbo;
+ struct rect rect;
+
+ _mesa_meta_begin(ctx, MESA_META_ALL);
+
+ _mesa_GenFramebuffers(1, &fbo);
+ rbo = brw_get_rb_for_slice(brw, mt, 0, 0, false);
+
+ _mesa_BindFramebuffer(GL_DRAW_FRAMEBUFFER, fbo);
+ _mesa_FramebufferRenderbuffer(GL_DRAW_FRAMEBUFFER,
+ GL_COLOR_ATTACHMENT0,
+ GL_RENDERBUFFER, rbo);
+ _mesa_DrawBuffer(GL_COLOR_ATTACHMENT0);
+
+ brw_fast_clear_init(brw);
+
+ use_rectlist(brw, true);
+
+ brw_bind_rep_write_shader(brw, (float *) fast_clear_color);
+
+ set_fast_clear_op(brw, GEN7_PS_RENDER_TARGET_RESOLVE_ENABLE);
+
+ mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_RESOLVED;
+ get_resolve_rect(brw, mt, &rect);
+
+ brw_draw_rectlist(ctx, &rect, 1);
+
+ set_fast_clear_op(brw, 0);
+ use_rectlist(brw, false);
+
+ _mesa_DeleteRenderbuffers(1, &rbo);
+ _mesa_DeleteFramebuffers(1, &fbo);
+
+ _mesa_meta_end(ctx);
+
+ intel_batchbuffer_emit_mi_flush(brw);
+
+ /*
+ * We're typically called from intel_update_state() and we're supposed to
+ * return with the state all updated to what it was before
+ * brw_meta_resolve_color() was called. The meta rendering will have
+ * messed up the state and we need to call _mesa_update_state() again to
+ * get back to where we were supposed to be when resolve was called.
+ */
+ if (ctx->NewState)
+ _mesa_update_state(ctx);
+}
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 38396d7..8b20939 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -169,7 +169,7 @@ intel_is_non_msrt_mcs_buffer_supported(struct brw_context *brw,
struct intel_mipmap_tree *mt)
{
/* MCS support does not exist prior to Gen7 */
- if (brw->gen < 7 || brw->gen >= 8)
+ if (brw->gen < 7)
return false;
/* MCS is only supported for color buffers */
@@ -1567,7 +1567,7 @@ intel_miptree_resolve_color(struct brw_context *brw,
case INTEL_FAST_CLEAR_STATE_CLEAR:
/* Fast color clear resolves only make sense for non-MSAA buffers. */
if (mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE)
- brw_blorp_resolve_color(brw, mt);
+ brw_meta_resolve_color(brw, mt);
break;
}
}
diff --git a/src/mesa/drivers/dri/i965/intel_tex_copy.c b/src/mesa/drivers/dri/i965/intel_tex_copy.c
index 97f1569..2456080 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_copy.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_copy.c
@@ -79,6 +79,8 @@ intel_copy_texsubimage(struct brw_context *brw,
int dst_slice = slice + intelImage->base.Base.Face +
intelImage->base.Base.TexObject->MinLayer;
+ _mesa_unlock_texture(&brw->ctx, intelImage->base.Base.TexObject);
+
/* blit from src buffer to texture */
if (!intel_miptree_blit(brw,
irb->mt, irb->mt_level, irb->mt_layer,
@@ -89,6 +91,8 @@ intel_copy_texsubimage(struct brw_context *brw,
return false;
}
+ _mesa_lock_texture(&brw->ctx, intelImage->base.Base.TexObject);
+
return true;
}
--
2.0.0
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