[Mesa-dev] [PATCH v3 16/19] i965: Support array_layout == ALL_SLICES_AT_EACH_LOD for multiple LODs

Kenneth Graunke kenneth at whitecape.org
Tue Aug 12 14:53:08 PDT 2014


On Friday, August 01, 2014 12:53:46 AM Jordan Justen wrote:
> Previously array_layout ALL_SLICES_AT_EACH_LOD was only used for array
> spacing lod0 on gen7+ and therefore was only used with a single mip
> level.
> 
> gen6 separate stencil & hiz only support LOD0, so we need to allocate
> the miptree similar to gen7+ array spacing lod0, except we also need
> space for multiple mip levels. (Since OpenGL stencil and depth support
> multiple LODs.)
> 
> The miptree is allocated with tightly packed array slice spacing, but
> we still also pack the miplevels into the region similar to a normal
> multi mip level packing.
> 
> A 2D Array texture with 2 slices and multiple LODs would look somewhat
> like this:
> 
> +----------+
> |          |
> |          |
> +----------+
> |          |
> |          |
> +----------+
> +---+ +-+
> |   | +-+
> +---+ +-+
> |   | :
> +---+

It'd be great to include this diagram in the comment for the ALL_SLICES_AT_EACH_LOD enum value definition.  It might also be worth mentioning that this is not a hardware layout - the hardware only sees one particular miplevel's array slices, and thinks LOD = 0, treating as a non-mipmapped surface.  This trick simply allows us to store multiple array textures in a single BO.

Patches 1-12 are:
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

Patches 13-19 are:
Acked-by: Kenneth Graunke <kenneth at whitecape.org>

I've looked them over, and I think they're doing the right thing, but I haven't invested the time to try and untangle it completely.

Assuming there are no regressions on Gen7 (IVB, BYT, HSW, whatever you have handy), then I'd say go ahead and push this series.

--Ken
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