[Mesa-dev] [PATCH 3/4] i965/fs: Try to emit LINE instructions on Gen <= 5.

[Matt Turner]

On Thu, Dec 4, 2014 at 7:07 PM, Ian Romanick <idr at freedesktop.org> wrote:
> On 12/04/2014 04:37 PM, Matt Turner wrote:
>> The LINE instruction performs a multiply-add instruction (a * b + c)
>> where b and c are scalar arguments. It reads b and c from offsets in
>> src0 such that you can load them (it they're representable) as a
>> vector-float immediate with a single instruction.
>>
>> Hurts some programs, but that'll all get better once we CSE the
>> vector-float MOVs in the next patch.
>>
>
> Why only on Gen <= 5?  It looks like the instruction still exists at
> least on Gen6.

On Gen 6 and up, we probably prefer to use a MAD instruction (pre-Gen6
there's no MAD instruction). Removing the brw->gen <= 5 check though
does have some merit:

(Note, the order in which we try to emit line/mad doesn't change the results)

total instructions in shared programs: 5807536 -> 5768438 (-0.67%)
instructions in affected programs:     2317584 -> 2278486 (-1.69%)
GAINED:                                1
LOST:                                  18

Unfortunately there's a bunch of lost SIMD16 programs, for likely the
same reason as enabling MAD when you have constant arguments hurts --
because you're increasing register pressure to hold the constant
arguments.

I suspect we should be tracking number of registers used for Gen <= 5
in shader-db. This series may have increased register pressure, which
would reduce parallelism. :(

Better information needed. And some improvements to scheduling. And to
finish my constants combining pass...