[Mesa-dev] [PATCH] i965: Consider SEL.{GE, L} to be commutative operations.

Matt Turner mattst88 at gmail.com
Sun Dec 21 15:37:25 PST 2014


---
No shader-db changes, unfortunately.

 src/mesa/drivers/dri/i965/brw_fs_cse.cpp   | 14 ++++++++++----
 src/mesa/drivers/dri/i965/brw_vec4_cse.cpp | 18 ++++++++++++------
 2 files changed, 22 insertions(+), 10 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
index 38fae17..2488596 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
@@ -109,22 +109,28 @@ is_expression(const fs_inst *const inst)
 }
 
 static bool
-is_expression_commutative(enum opcode op)
+is_expression_commutative(const fs_inst *inst)
 {
-   switch (op) {
+   switch (inst->opcode) {
    case BRW_OPCODE_AND:
    case BRW_OPCODE_OR:
    case BRW_OPCODE_XOR:
    case BRW_OPCODE_ADD:
    case BRW_OPCODE_MUL:
       return true;
+   case BRW_OPCODE_SEL:
+      if (inst->conditional_mod == BRW_CONDITIONAL_GE ||
+          inst->conditional_mod == BRW_CONDITIONAL_L) {
+         return true;
+      }
+      /* fallthrough */
    default:
       return false;
    }
 }
 
 static bool
-operands_match(fs_inst *a, fs_inst *b)
+operands_match(const fs_inst *a, fs_inst *b)
 {
    fs_reg *xs = a->src;
    fs_reg *ys = b->src;
@@ -133,7 +139,7 @@ operands_match(fs_inst *a, fs_inst *b)
       return xs[0].equals(ys[0]) &&
              ((xs[1].equals(ys[1]) && xs[2].equals(ys[2])) ||
               (xs[2].equals(ys[1]) && xs[1].equals(ys[2])));
-   } else if (!is_expression_commutative(a->opcode)) {
+   } else if (!is_expression_commutative(a)) {
       bool match = true;
       for (int i = 0; i < a->sources; i++) {
          if (!xs[i].equals(ys[i])) {
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp b/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp
index 7071213..1b47de4 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp
@@ -88,28 +88,34 @@ is_expression(const vec4_instruction *const inst)
 }
 
 static bool
-is_expression_commutative(enum opcode op)
+is_expression_commutative(const vec4_instruction *inst)
 {
-   switch (op) {
+   switch (inst->opcode) {
    case BRW_OPCODE_AND:
    case BRW_OPCODE_OR:
    case BRW_OPCODE_XOR:
    case BRW_OPCODE_ADD:
    case BRW_OPCODE_MUL:
       return true;
+   case BRW_OPCODE_SEL:
+      if (inst->conditional_mod == BRW_CONDITIONAL_GE ||
+          inst->conditional_mod == BRW_CONDITIONAL_L) {
+         return true;
+      }
+      /* fallthrough */
    default:
       return false;
    }
 }
 
 static bool
-operands_match(enum opcode op, src_reg *xs, src_reg *ys)
+operands_match(const vec4_instruction *inst, src_reg *xs, src_reg *ys)
 {
-   if (op == BRW_OPCODE_MAD) {
+   if (inst->opcode == BRW_OPCODE_MAD) {
       return xs[0].equals(ys[0]) &&
              ((xs[1].equals(ys[1]) && xs[2].equals(ys[2])) ||
               (xs[2].equals(ys[1]) && xs[1].equals(ys[2])));
-   } else if (!is_expression_commutative(op)) {
+   } else if (!is_expression_commutative(inst)) {
       return xs[0].equals(ys[0]) && xs[1].equals(ys[1]) && xs[2].equals(ys[2]);
    } else {
       return (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
@@ -125,7 +131,7 @@ instructions_match(vec4_instruction *a, vec4_instruction *b)
           a->conditional_mod == b->conditional_mod &&
           a->dst.type == b->dst.type &&
           a->dst.writemask == b->dst.writemask &&
-          operands_match(a->opcode, a->src, b->src);
+          operands_match(a, a->src, b->src);
 }
 
 bool
-- 
2.0.4



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