[Mesa-dev] [PATCH 03/21] i965: Add QWORD sizes to type_sz macro

Ben Widawsky benjamin.widawsky at intel.com
Mon Dec 22 19:29:13 PST 2014


GEN8 added the QWORD as a valid type for certain operations on the EU. In order
to calculate the number of registers used one must have the type size as part of
the equation. Quoting the formula in the code: regs_written = (dst.width *
dst.stride * type_sz(dst.type) + 31) / 32;

Adding this separately for bisection since there is no simple way to add an
assert in the type_sz function.

NOTE: As a side note, I was confused for a while because it's impossible to
calculate the region, ie. registers needed, without vstride. However, at this
point these are all part of the IR, and so no vstride must exist.

Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
---
 src/mesa/drivers/dri/i965/brw_reg.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_reg.h b/src/mesa/drivers/dri/i965/brw_reg.h
index a04149c..76d3248 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/drivers/dri/i965/brw_reg.h
@@ -171,6 +171,9 @@ static inline int
 type_sz(unsigned type)
 {
    switch(type) {
+   case BRW_REGISTER_TYPE_UQ:
+   case BRW_REGISTER_TYPE_Q:
+      return 8;
    case BRW_REGISTER_TYPE_UD:
    case BRW_REGISTER_TYPE_D:
    case BRW_REGISTER_TYPE_F:
-- 
2.2.1



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