[Mesa-dev] [PATCH v4 9/9] i965: support instanced GS on gen7

[Jordan Justen]

v3:
 * Properly prevent dual object mode execution when
   the invocation count > 1

Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
---
 src/mesa/drivers/dri/i965/brw_context.h           | 2 ++
 src/mesa/drivers/dri/i965/brw_defines.h           | 1 +
 src/mesa/drivers/dri/i965/brw_vec4_gs.c           | 2 ++
 src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | 6 ++++--
 src/mesa/drivers/dri/i965/gen7_gs_state.c         | 2 ++
 5 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index bee39fa..eb31eca 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -647,6 +647,8 @@ struct brw_gs_prog_data
 
    bool include_primitive_id;
 
+   int invocations;
+
    /**
     * True if the thread should be dispatched in DUAL_INSTANCE mode, false if
     * it should be dispatched in DUAL_OBJECT mode.
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 199a699..a46d881 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1518,6 +1518,7 @@ enum brw_message_target {
 # define GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_CUT		0
 # define GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_SID		1
 # define GEN7_GS_CONTROL_DATA_HEADER_SIZE_SHIFT		20
+# define GEN7_GS_INSTANCE_CONTROL_SHIFT			15
 # define GEN7_GS_DISPATCH_MODE_SINGLE			(0 << 11)
 # define GEN7_GS_DISPATCH_MODE_DUAL_INSTANCE		(1 << 11)
 # define GEN7_GS_DISPATCH_MODE_DUAL_OBJECT		(2 << 11)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs.c b/src/mesa/drivers/dri/i965/brw_vec4_gs.c
index abc181b..3c6393f 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs.c
@@ -48,6 +48,8 @@ do_gs_prog(struct brw_context *brw,
    c.prog_data.include_primitive_id =
       (gp->program.Base.InputsRead & VARYING_BIT_PRIMITIVE_ID) != 0;
 
+   c.prog_data.invocations = gp->program.Invocations;
+
    /* Allocate the references to the uniforms that will end up in the
     * prog_data associated with the compiled program, and which will be freed
     * by the state cache.
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
index 360703b..f586c41 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
@@ -588,9 +588,11 @@ brw_gs_emit(struct brw_context *brw,
    }
 
    /* Compile the geometry shader in DUAL_OBJECT dispatch mode, if we can do
-    * so without spilling.
+    * so without spilling. If the GS invocations count > 1, then we can't use
+    * dual object mode.
     */
-   if (likely(!(INTEL_DEBUG & DEBUG_NO_DUAL_OBJECT_GS))) {
+   if (c->prog_data.invocations <= 1 &&
+       likely(!(INTEL_DEBUG & DEBUG_NO_DUAL_OBJECT_GS))) {
       c->prog_data.dual_instanced_dispatch = false;
 
       vec4_gs_visitor v(brw, c, prog, shader, mem_ctx, true /* no_spills */);
diff --git a/src/mesa/drivers/dri/i965/gen7_gs_state.c b/src/mesa/drivers/dri/i965/gen7_gs_state.c
index d2ba354..b179d19 100644
--- a/src/mesa/drivers/dri/i965/gen7_gs_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_gs_state.c
@@ -153,6 +153,8 @@ upload_gs_state(struct brw_context *brw)
          ((brw->max_gs_threads - 1) << max_threads_shift) |
          (brw->gs.prog_data->control_data_header_size_hwords <<
           GEN7_GS_CONTROL_DATA_HEADER_SIZE_SHIFT) |
+         ((brw->gs.prog_data->invocations - 1) <<
+          GEN7_GS_INSTANCE_CONTROL_SHIFT) |
          (brw->gs.prog_data->dual_instanced_dispatch ?
           GEN7_GS_DISPATCH_MODE_DUAL_INSTANCE :
           GEN7_GS_DISPATCH_MODE_DUAL_OBJECT) |
-- 
1.9.rc1