[Mesa-dev] [PATCH 1/3] i965: Don't print source registers for Broadwell flow control.
Kenneth Graunke
kenneth at whitecape.org
Fri Feb 7 10:58:43 PST 2014
The bits which normally contain the source register descriptions
actually contain the JIP/UIP jump targets, which we already printed.
Interpreting JIP/UIP as source registers results in some really creepy
looking output, like IF statements with acc14.4<0,1,0>UD sources.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
src/mesa/drivers/dri/i965/gen8_disasm.c | 27 ++++++++++++++-------------
1 file changed, 14 insertions(+), 13 deletions(-)
Note that all of the flow control instructions have ndst == 0, so moving
that code should have no effect.
diff --git a/src/mesa/drivers/dri/i965/gen8_disasm.c b/src/mesa/drivers/dri/i965/gen8_disasm.c
index 387bb71..b2ab448 100644
--- a/src/mesa/drivers/dri/i965/gen8_disasm.c
+++ b/src/mesa/drivers/dri/i965/gen8_disasm.c
@@ -828,10 +828,7 @@ gen8_disassemble(FILE *file, struct gen8_instruction *inst, int gen)
pad(file, 64);
err |= src2_3src(file, inst);
} else {
- if (m_opcode[opcode].ndst > 0) {
- pad(file, 16);
- err |= dest(file, inst);
- } else if (opcode == BRW_OPCODE_ENDIF) {
+ if (opcode == BRW_OPCODE_ENDIF) {
format(file, " %d", gen8_jip(inst));
} else if (opcode == BRW_OPCODE_IF ||
opcode == BRW_OPCODE_ELSE ||
@@ -840,15 +837,19 @@ gen8_disassemble(FILE *file, struct gen8_instruction *inst, int gen)
opcode == BRW_OPCODE_CONTINUE ||
opcode == BRW_OPCODE_HALT) {
format(file, " %d %d", gen8_jip(inst), gen8_uip(inst));
- }
-
- if (m_opcode[opcode].nsrc > 0) {
- pad(file, 32);
- err |= src0(file, inst);
- }
- if (m_opcode[opcode].nsrc > 1) {
- pad(file, 48);
- err |= src1(file, inst);
+ } else {
+ if (m_opcode[opcode].ndst > 0) {
+ pad(file, 16);
+ err |= dest(file, inst);
+ }
+ if (m_opcode[opcode].nsrc > 0) {
+ pad(file, 32);
+ err |= src0(file, inst);
+ }
+ if (m_opcode[opcode].nsrc > 1) {
+ pad(file, 48);
+ err |= src1(file, inst);
+ }
}
}
--
1.8.5.2
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