[Mesa-dev] [PATCH 3/8] i965: Bump generation check in code to disable HiZ at LODs > 0.

[Kenneth Graunke]

Broadwell's "HiZ Resolve" operation still has the restriction that the
rectangle primitive must be 8x4 aligned.  So I believe we still need
this.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index c9f5bb3..facceb0 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1324,7 +1324,7 @@ intel_miptree_slice_enable_hiz(struct brw_context *brw,
 {
    assert(mt->hiz_mt);
 
-   if (brw->is_haswell) {
+   if (brw->gen >= 8 || brw->is_haswell) {
       const struct intel_mipmap_level *l = &mt->level[level];
 
       /* Disable HiZ for LOD > 0 unless the width is 8 aligned
-- 
1.8.4.2