[Mesa-dev] [PATCH 00/23] i965 compiler fixes in preparation for ARB_shader_image_load_store.

[Matt Turner]

On Mon, Dec 2, 2013 at 11:31 AM, Francisco Jerez <currojerez at riseup.net> wrote:
> [PATCH 07/23] i965/fs: Add support for sub-register byte offsets to the FS back-end IR.
> [PATCH 08/23] i965/fs: Add support for specifying register horizontal strides.
> [PATCH 09/23] i965/fs: Remove fs_reg::smear.
> [PATCH 10/23] i965/fs: Remove fs_reg::sechalf.
> [PATCH 11/23] i965/vec4: Fix confusion between SWIZZLE and BRW_SWIZZLE macros.

Reviewed-by: Matt Turner <mattst88 at gmail.com>

Some work I'm doing needs sub-register offsets, so I was going to
commit these patches today. But since you're already committing code
today, maybe you'd like to do it?

Thanks,
Matt