[Mesa-dev] [PATCH-RFC] i965: do not advertise MESA_FORMAT_Z_UNORM16 support

[Chia-I Wu]

Since 73bc6061f5c3b6a3bb7a8114bb2e1ab77d23cfdb, Z16 support is not advertised
for OpenGL ES contexts due to the terrible performance.  It is still enabled
for desktop GL because it was believed GL 3.0+ requires Z16.

It turns out only GL 3.0 requires Z16, and that is corrected in later GL
versions.  In light of that, and per Ian's suggestion, stop advertising Z16
support by default, and add a drirc option, gl30_sized_format_rules, so that
users can override.

This regresses required-sized-texture-formats on GL 3.0.

Signed-off-by: Chia-I Wu <olv at lunarg.com>
Cc: Ian Romanick <ian.d.romanick at intel.com>
---
 src/mesa/drivers/dri/i965/brw_context.c         | 3 +++
 src/mesa/drivers/dri/i965/brw_context.h         | 1 +
 src/mesa/drivers/dri/i965/brw_surface_formats.c | 7 ++++---
 src/mesa/drivers/dri/i965/intel_screen.c        | 4 ++++
 4 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index ffbdb94..8ecf80b 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -553,6 +553,9 @@ brw_process_driconf_options(struct brw_context *brw)
    brw->disable_derivative_optimization =
       driQueryOptionb(&brw->optionCache, "disable_derivative_optimization");
 
+   brw->enable_z16 =
+      driQueryOptionb(&brw->optionCache, "gl30_sized_format_rules");
+
    brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile");
 
    ctx->Const.ForceGLSLExtensionsWarn =
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 98e90e2..fd10884 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1093,6 +1093,7 @@ struct brw_context
    bool disable_throttling;
    bool precompile;
    bool disable_derivative_optimization;
+   bool enable_z16;
 
    driOptionCache optionCache;
    /** @} */
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index 6a7e00a..1d5f044 100644
--- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
+++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
@@ -623,10 +623,11 @@ brw_init_surface_formats(struct brw_context *brw)
     * increased depth stalls from a cacheline-based heuristic for detecting
     * depth stalls.
     *
-    * However, desktop GL 3.0+ require that you get exactly 16 bits when
-    * asking for DEPTH_COMPONENT16, so we have to respect that.
+    * However, desktop GL 3.0, and no other version, requires that you get
+    * exactly 16 bits when asking for DEPTH_COMPONENT16, so we have an drirc
+    * option to decide whether to respect that or not.
     */
-   if (_mesa_is_desktop_gl(ctx))
+   if (brw->enable_z16)
       ctx->TextureFormatSupported[MESA_FORMAT_Z_UNORM16] = true;
 
    /* On hardware that lacks support for ETC1, we map ETC1 to RGBX
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index ba22971..087fc3c 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -64,6 +64,10 @@ DRI_CONF_BEGIN
       DRI_CONF_OPT_BEGIN_B(disable_derivative_optimization, "false")
 	 DRI_CONF_DESC(en, "Derivatives with finer granularity by default")
       DRI_CONF_OPT_END
+
+      DRI_CONF_OPT_BEGIN_B(gl30_sized_format_rules, "false")
+	 DRI_CONF_DESC(en, "Honor GL 3.0 specific rules for sized formats")
+      DRI_CONF_OPT_END
    DRI_CONF_SECTION_END
 
    DRI_CONF_SECTION_QUALITY
-- 
1.8.3.1