[Mesa-dev] [RFC 04/27] i965: Allow w-tiled miptree offsets to be resolved as y-tiled directly
Ian Romanick
idr at freedesktop.org
Mon Feb 24 10:51:58 PST 2014
On 02/22/2014 01:05 AM, Topi Pohjolainen wrote:
> This is not utilised yet but will be needed when W-tiled stencil is
> sampled as Y-tiled.
>
> Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> ---
> src/mesa/drivers/dri/i965/intel_fbo.h | 2 +-
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 11 +++++++++--
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 1 +
> src/mesa/drivers/dri/i965/intel_tex_image.c | 3 ++-
> 4 files changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/intel_fbo.h b/src/mesa/drivers/dri/i965/intel_fbo.h
> index b8db7e2..05a2ea8 100644
> --- a/src/mesa/drivers/dri/i965/intel_fbo.h
> +++ b/src/mesa/drivers/dri/i965/intel_fbo.h
> @@ -191,7 +191,7 @@ intel_renderbuffer_get_tile_offsets(struct intel_renderbuffer *irb,
> uint32_t *tile_y)
> {
> return intel_miptree_get_tile_offsets(irb->mt, irb->mt_level, irb->mt_layer,
> - tile_x, tile_y);
> + false, tile_x, tile_y);
> }
>
> bool
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index 89df0d3..b48dc5f 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -943,6 +943,7 @@ intel_miptree_get_image_offset(const struct intel_mipmap_tree *mt,
> uint32_t
> intel_miptree_get_tile_offsets(const struct intel_mipmap_tree *mt,
> GLuint level, GLuint slice,
> + bool map_w_as_y_tiled,
> uint32_t *tile_x,
> uint32_t *tile_y)
It seems that all the other functions have map_w_as_y_tiled as the last
parameter. This function should use the same pattern... to prevent
future typos.
> {
> @@ -950,14 +951,20 @@ intel_miptree_get_tile_offsets(const struct intel_mipmap_tree *mt,
> uint32_t x, y;
> uint32_t mask_x, mask_y;
>
> - intel_region_get_tile_masks(region, &mask_x, &mask_y, false);
> + intel_region_get_tile_masks(region, &mask_x, &mask_y, map_w_as_y_tiled);
> intel_miptree_get_image_offset(mt, level, slice, &x, &y);
> +
> + /* Y-tile is twice as wide and half as high as W-tile */
> + if (map_w_as_y_tiled) {
> + x *= 2;
> + y /= 2;
> + }
>
> *tile_x = x & mask_x;
> *tile_y = y & mask_y;
>
> return intel_region_get_aligned_offset(region, x & ~mask_x, y & ~mask_y,
> - false);
> + map_w_as_y_tiled);
> }
>
> static void
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> index 4250e0f..ba80baa 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> @@ -531,6 +531,7 @@ intel_miptree_get_dimensions_for_image(struct gl_texture_image *image,
> uint32_t
> intel_miptree_get_tile_offsets(const struct intel_mipmap_tree *mt,
> GLuint level, GLuint slice,
> + bool map_w_as_y_tiled,
> uint32_t *tile_x,
> uint32_t *tile_y);
>
> diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c
> index ee02e68..2e66729 100644
> --- a/src/mesa/drivers/dri/i965/intel_tex_image.c
> +++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
> @@ -242,7 +242,8 @@ intel_set_texture_image_region(struct gl_context *ctx,
> intel_image->mt->level[0].slice[0].x_offset = tile_x;
> intel_image->mt->level[0].slice[0].y_offset = tile_y;
>
> - intel_miptree_get_tile_offsets(intel_image->mt, 0, 0, &draw_x, &draw_y);
> + intel_miptree_get_tile_offsets(intel_image->mt, 0, 0, false,
> + &draw_x, &draw_y);
>
> /* From "OES_EGL_image" error reporting. We report GL_INVALID_OPERATION
> * for EGL images from non-tile aligned sufaces in gen4 hw and earlier which has
>
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