[Mesa-dev] [PATCH 3/3] i965/Gen7: Only emit cube face enables for cubes.

[Kenneth Graunke]

On 01/08/2014 01:11 PM, Chris Forbes wrote:
> This is not observed to actually fix anything, but the PRM says this
> field must be zero for other surface types.
> 
> Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
> ---
>  src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> index 761bc3b..bda09a0 100644
> --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> @@ -298,8 +298,11 @@ gen7_update_texture_surface(struct gl_context *ctx,
>  
>     surf[0] = translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
>               tex_format << BRW_SURFACE_FORMAT_SHIFT |
> -             gen7_surface_tiling_mode(mt->region->tiling) |
> -             BRW_SURFACE_CUBEFACE_ENABLES;
> +             gen7_surface_tiling_mode(mt->region->tiling);
> +
> +   /* mask of faces present in cube map; for other surfaces MBZ. */
> +   if (tObj->Target == GL_TEXTURE_CUBE_MAP || tObj->Target == GL_TEXTURE_CUBE_MAP_ARRAY)
> +      surf[0] |= BRW_SURFACE_CUBEFACE_ENABLES;
>  
>     if (mt->align_h == 4)
>        surf[0] |= GEN7_SURFACE_VALIGN_4;
> 

We also enable it universally on Gen4-6.  We should probably be
consistent one way or another.

This series is:
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>