[Mesa-dev] [v2 13/23] i965/blorp: wrap SHR (/brw_SHR(&func, /emit_shr(/)

Topi Pohjolainen topi.pohjolainen at intel.com
Wed Jan 22 09:17:05 PST 2014


Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Paul Berry <stereotype441 at gmail.com>
---
 src/mesa/drivers/dri/i965/brw_blorp_blit.cpp  | 24 ++++++++++++------------
 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h |  7 +++++++
 2 files changed, 19 insertions(+), 12 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 392e7a5..715c716 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -1087,7 +1087,7 @@ brw_blorp_blit_program::compute_frag_coords()
          struct brw_reg t2_uw1 = retype(t2, BRW_REGISTER_TYPE_UW);
          struct brw_reg r0_ud1 = vec1(retype(R0, BRW_REGISTER_TYPE_UD));
          emit_and(t1_ud1, r0_ud1, brw_imm_ud(0xc0));
-         brw_SHR(&func, t1_ud1, t1_ud1, brw_imm_ud(5));
+         emit_shr(t1_ud1, t1_ud1, brw_imm_ud(5));
          emit_mov(vec16(t2_uw1), brw_imm_v(0x3210));
          emit_add(vec16(S), retype(t1_ud1, BRW_REGISTER_TYPE_UW),
                   stride(t2_uw1, 1, 4, 0));
@@ -1164,7 +1164,7 @@ brw_blorp_blit_program::translate_tiling(bool old_tiled_w, bool new_tiled_w)
        *   Y' = (Y & ~0b1) << 1 | (X & 0b1000) >> 2 | (X & 0b10) >> 1
        */
       emit_and(t1, X, brw_imm_uw(0xfff4)); /* X & ~0b1011 */
-      brw_SHR(&func, t1, t1, brw_imm_uw(1)); /* (X & ~0b1011) >> 1 */
+      emit_shr(t1, t1, brw_imm_uw(1)); /* (X & ~0b1011) >> 1 */
       emit_and(t2, Y, brw_imm_uw(1)); /* Y & 0b1 */
       brw_SHL(&func, t2, t2, brw_imm_uw(2)); /* (Y & 0b1) << 2 */
       brw_OR(&func, t1, t1, t2); /* (X & ~0b1011) >> 1 | (Y & 0b1) << 2 */
@@ -1173,10 +1173,10 @@ brw_blorp_blit_program::translate_tiling(bool old_tiled_w, bool new_tiled_w)
       emit_and(t1, Y, brw_imm_uw(0xfffe)); /* Y & ~0b1 */
       brw_SHL(&func, t1, t1, brw_imm_uw(1)); /* (Y & ~0b1) << 1 */
       emit_and(t2, X, brw_imm_uw(8)); /* X & 0b1000 */
-      brw_SHR(&func, t2, t2, brw_imm_uw(2)); /* (X & 0b1000) >> 2 */
+      emit_shr(t2, t2, brw_imm_uw(2)); /* (X & 0b1000) >> 2 */
       brw_OR(&func, t1, t1, t2); /* (Y & ~0b1) << 1 | (X & 0b1000) >> 2 */
       emit_and(t2, X, brw_imm_uw(2)); /* X & 0b10 */
-      brw_SHR(&func, t2, t2, brw_imm_uw(1)); /* (X & 0b10) >> 1 */
+      emit_shr(t2, t2, brw_imm_uw(1)); /* (X & 0b10) >> 1 */
       brw_OR(&func, Yp, t1, t2);
       SWAP_XY_AND_XPYP();
    } else {
@@ -1198,9 +1198,9 @@ brw_blorp_blit_program::translate_tiling(bool old_tiled_w, bool new_tiled_w)
       emit_and(t2, X, brw_imm_uw(1)); /* X & 0b1 */
       brw_OR(&func, Xp, t1, t2);
       emit_and(t1, Y, brw_imm_uw(0xfffc)); /* Y & ~0b11 */
-      brw_SHR(&func, t1, t1, brw_imm_uw(1)); /* (Y & ~0b11) >> 1 */
+      emit_shr(t1, t1, brw_imm_uw(1)); /* (Y & ~0b11) >> 1 */
       emit_and(t2, X, brw_imm_uw(4)); /* X & 0b100 */
-      brw_SHR(&func, t2, t2, brw_imm_uw(2)); /* (X & 0b100) >> 2 */
+      emit_shr(t2, t2, brw_imm_uw(2)); /* (X & 0b100) >> 2 */
       brw_OR(&func, Yp, t1, t2);
       SWAP_XY_AND_XPYP();
    }
@@ -1331,16 +1331,16 @@ brw_blorp_blit_program::decode_msaa(unsigned num_samples,
           *         S = (Y & 0b10) | (X & 0b10) >> 1
           */
          emit_and(t1, X, brw_imm_uw(0xfffc)); /* X & ~0b11 */
-         brw_SHR(&func, t1, t1, brw_imm_uw(1)); /* (X & ~0b11) >> 1 */
+         emit_shr(t1, t1, brw_imm_uw(1)); /* (X & ~0b11) >> 1 */
          emit_and(t2, X, brw_imm_uw(1)); /* X & 0b1 */
          brw_OR(&func, Xp, t1, t2);
          emit_and(t1, Y, brw_imm_uw(0xfffc)); /* Y & ~0b11 */
-         brw_SHR(&func, t1, t1, brw_imm_uw(1)); /* (Y & ~0b11) >> 1 */
+         emit_shr(t1, t1, brw_imm_uw(1)); /* (Y & ~0b11) >> 1 */
          emit_and(t2, Y, brw_imm_uw(1)); /* Y & 0b1 */
          brw_OR(&func, Yp, t1, t2);
          emit_and(t1, Y, brw_imm_uw(2)); /* Y & 0b10 */
          emit_and(t2, X, brw_imm_uw(2)); /* X & 0b10 */
-         brw_SHR(&func, t2, t2, brw_imm_uw(1)); /* (X & 0b10) >> 1 */
+         emit_shr(t2, t2, brw_imm_uw(1)); /* (X & 0b10) >> 1 */
          brw_OR(&func, S, t1, t2);
          break;
       case 8:
@@ -1350,18 +1350,18 @@ brw_blorp_blit_program::decode_msaa(unsigned num_samples,
           *         S = (X & 0b100) | (Y & 0b10) | (X & 0b10) >> 1
           */
          emit_and(t1, X, brw_imm_uw(0xfff8)); /* X & ~0b111 */
-         brw_SHR(&func, t1, t1, brw_imm_uw(2)); /* (X & ~0b111) >> 2 */
+         emit_shr(t1, t1, brw_imm_uw(2)); /* (X & ~0b111) >> 2 */
          emit_and(t2, X, brw_imm_uw(1)); /* X & 0b1 */
          brw_OR(&func, Xp, t1, t2);
          emit_and(t1, Y, brw_imm_uw(0xfffc)); /* Y & ~0b11 */
-         brw_SHR(&func, t1, t1, brw_imm_uw(1)); /* (Y & ~0b11) >> 1 */
+         emit_shr(t1, t1, brw_imm_uw(1)); /* (Y & ~0b11) >> 1 */
          emit_and(t2, Y, brw_imm_uw(1)); /* Y & 0b1 */
          brw_OR(&func, Yp, t1, t2);
          emit_and(t1, X, brw_imm_uw(4)); /* X & 0b100 */
          emit_and(t2, Y, brw_imm_uw(2)); /* Y & 0b10 */
          brw_OR(&func, t1, t1, t2); /* (X & 0b100) | (Y & 0b10) */
          emit_and(t2, X, brw_imm_uw(2)); /* X & 0b10 */
-         brw_SHR(&func, t2, t2, brw_imm_uw(1)); /* (X & 0b10) >> 1 */
+         emit_shr(t2, t2, brw_imm_uw(1)); /* (X & 0b10) >> 1 */
          brw_OR(&func, S, t1, t2);
          break;
       }
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h
index 24b8ea2..9c2f9c1 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h
@@ -109,6 +109,13 @@ protected:
       brw_set_compression_control(&func, BRW_COMPRESSION_COMPRESSED);
    }
 
+   inline void emit_shr(const struct brw_reg& dst,
+                        const struct brw_reg& src1,
+                        const struct brw_reg& src2)
+   {
+      brw_SHR(&func, dst, src1, src2);
+   }
+
    void *mem_ctx;
    struct brw_compile func;
 };
-- 
1.8.3.1



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