[Mesa-dev] [PATCH 3/4] i965/fs: Support arbitrarily large sampler indices on Broadwell+.

[Kenneth Graunke]

On 01/23/2014 03:54 PM, Chris Forbes wrote:
> How big is the sampler state pointer on Broadwell?
> 
> My understanding was it would have to be >32bits, and this looks like
> it will do the wrong thing if the sampler state table is placed across
> a 4G boundary. Perhaps there is something else that makes this not a
> factor, though.

Hey Chris,

The sampler state "pointer" is still a 32-bit value, relative to Dynamic
State Base Address - the same as on Haswell.  Assuming you program the
base address to the start of some buffer, the sampler state pointer is
really an offset inside the buffer...and 32 bits is plenty for that.

--Ken

> On Fri, Jan 24, 2014 at 10:13 AM, Kenneth Graunke <kenneth at whitecape.org> wrote:
>> I added support for these on Haswell, but forgot to update the Broadwell
>> code before landing it.  Partially fixes Piglit's max-samplers test.
>>
>> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
>> ---
>>  src/mesa/drivers/dri/i965/gen8_fs_generator.cpp | 19 ++++++++++++++++++-
>>  1 file changed, 18 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
>> index 62b1e02..151ddb8 100644
>> --- a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
>> +++ b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
>> @@ -254,6 +254,23 @@ gen8_fs_generator::generate_tex(fs_inst *ir,
>>                   brw_imm_ud(ir->texture_offset));
>>        }
>>
>> +      if (ir->sampler >= 16) {
>> +         /* The "Sampler Index" field can only store values between 0 and 15.
>> +          * However, we can add an offset to the "Sampler State Pointer"
>> +          * field, effectively selecting a different set of 16 samplers.
>> +          *
>> +          * The "Sampler State Pointer" needs to be aligned to a 32-byte
>> +          * offset, and each sampler state is only 16-bytes, so we can't
>> +          * exclusively use the offset - we have to use both.
>> +          */
>> +         gen8_instruction *add =
>> +            ADD(retype(brw_vec1_grf(src.nr, 3), BRW_REGISTER_TYPE_UD),
>> +                get_element_ud(brw_vec8_grf(0, 0), 3),
>> +                brw_imm_ud(16 * (ir->sampler / 16) *
>> +                           sizeof(gen7_sampler_state)));
>> +         gen8_set_mask_control(add, BRW_MASK_DISABLE);
>> +      }
>> +
>>        default_state.exec_size = save_exec_size;
>>     }
>>
>> @@ -265,7 +282,7 @@ gen8_fs_generator::generate_tex(fs_inst *ir,
>>     gen8_set_src0(brw, inst, src);
>>     gen8_set_sampler_message(brw, inst,
>>                              surf_index,
>> -                            ir->sampler,
>> +                            ir->sampler % 16,
>>                              msg_type,
>>                              rlen,
>>                              ir->mlen,
>> --
>> 1.8.5.2


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