[Mesa-dev] [PATCH] R600/SI: Add pattern for truncating i32 to i1

[Tom Stellard]

On Fri, Jan 24, 2014 at 01:27:00PM +0900, Michel Dänzer wrote:
> From: Michel Dänzer <michel.daenzer at amd.com>
> 
> Fixes half a dozen piglit tests with radeonsi.
> 
> Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
> ---
>  lib/Target/R600/SIInstructions.td |  5 +++++
>  test/CodeGen/R600/trunc.ll        | 10 ++++++++++
>  2 files changed, 15 insertions(+)
> 
> diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td
> index 03e7e32..b7b710f 100644
> --- a/lib/Target/R600/SIInstructions.td
> +++ b/lib/Target/R600/SIInstructions.td
> @@ -2126,6 +2126,11 @@ def : Pat <
>    (EXTRACT_SUBREG $a, sub0)
>  >;
>  
> +def : Pat <
> +  (i1 (trunc i32:$a)),
> +  (V_CMP_EQ_I32_e64 (V_AND_B32_e32 (i32 1), $a), 1)
> +>;
> +

I'm guessing you added V_CMP_EQ_I32_e64 in order to make the types match.
Try this pattern instead:

def : Pat <
  (i1 (trunc i32:$a)),
  (COPY_TO_REGCLASS (V_AND_B32_e32 (i32 1), $a), VReg_32)
>

-Tom

>  // V_ADD_I32_e32/S_ADD_I32 produces carry in VCC/SCC. For the vector
>  // case, the sgpr-copies pass will fix this to use the vector version.
>  def : Pat <
> diff --git a/test/CodeGen/R600/trunc.ll b/test/CodeGen/R600/trunc.ll
> index 0bd320a..6bbd7f7 100644
> --- a/test/CodeGen/R600/trunc.ll
> +++ b/test/CodeGen/R600/trunc.ll
> @@ -28,3 +28,13 @@ define void @trunc_shl_i64(i32 addrspace(1)* %out, i64 %a) {
>    store i32 %result, i32 addrspace(1)* %out, align 4
>    ret void
>  }
> +
> +; SI-LABEL: @trunc_i32_to_i1:
> +; SI: V_AND_B32
> +; SI: V_CMP_EQ_I32
> +define void @trunc_i32_to_i1(i32 addrspace(1)* %out, i32 %a) {
> +  %trunc = trunc i32 %a to i1
> +  %result = select i1 %trunc, i32 1, i32 0
> +  store i32 %result, i32 addrspace(1)* %out, align 4
> +  ret void
> +}
> -- 
> 1.8.5.3
> 
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