[Mesa-dev] [PATCH 08/12] i965/fs: Add support for gl_Layer input

[Chris Forbes]

This is a bit unusual -- we want to treat it as an input on the GLSL
side rather than a `system value` oddball. However, it doesn't get a
real slot in the VUE layout -- earlier shader stages write it into the
vertex header, and it appears in the FS payload packed into some R0.0
bits.

Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
---
 src/mesa/drivers/dri/i965/brw_fs.cpp         | 22 ++++++++++++++++++++++
 src/mesa/drivers/dri/i965/brw_fs.h           |  1 +
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |  2 ++
 3 files changed, 25 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 1e6c3e0..17d5237 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1272,6 +1272,28 @@ fs_visitor::emit_samplemaskin_setup(ir_variable *ir)
    return reg;
 }
 
+fs_reg *
+fs_visitor::emit_layer_setup(ir_variable *ir)
+{
+   /* The value for gl_Layer is provided in bits 26:16 of R0.0. */
+
+   /* These bits are actually present on all Gen4+ h/w, but until GS is enabled
+    * on earlier platforms we don't expect to get here on anything earlier
+    * than Gen7.
+    */
+   assert(brw->gen >= 7);
+
+   this->current_annotation = "gl_Layer";
+   fs_reg *reg = new(this->mem_ctx) fs_reg(this, ir->type);
+   fs_reg temp = fs_reg(this, glsl_type::int_type);
+   emit(BRW_OPCODE_SHR, temp,
+         fs_reg(retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_D)),
+         fs_reg(brw_imm_d(16)));
+   emit(BRW_OPCODE_AND, *reg, temp,
+         fs_reg(brw_imm_d(0x7ff)));
+   return reg;
+}
+
 fs_reg
 fs_visitor::fix_math_operand(fs_reg src)
 {
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 2ccb8c4..e04c341 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -345,6 +345,7 @@ public:
    fs_reg *emit_samplepos_setup(ir_variable *ir);
    fs_reg *emit_sampleid_setup(ir_variable *ir);
    fs_reg *emit_samplemaskin_setup(ir_variable *ir);
+   fs_reg *emit_layer_setup(ir_variable *ir);
    fs_reg *emit_general_interpolation(ir_variable *ir);
    void emit_interpolation_setup_gen4();
    void emit_interpolation_setup_gen6();
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index d88d24c..e949f4b 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -61,6 +61,8 @@ fs_visitor::visit(ir_variable *ir)
 	 reg = emit_fragcoord_interpolation(ir);
       } else if (!strcmp(ir->name, "gl_FrontFacing")) {
 	 reg = emit_frontfacing_interpolation(ir);
+      } else if (!strcmp(ir->name, "gl_Layer")) {
+         reg = emit_layer_setup(ir);
       } else {
 	 reg = emit_general_interpolation(ir);
       }
-- 
1.8.5.3