[Mesa-dev] [PATCH 2/3] i965: Drop bogus F32TO16/F16TO32 instructions on Broadwell - use MOV.

[Kenneth Graunke]

Broadwell removed the F32TO16 and F16TO32 instructions.  However, it has
actual support for HF values, so they're actually just MOV.

Fixes vs-packHalf2x16 and vs-unpackHalf2x16 tests (both the ARB
extension and ES 3.0 variants).

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 src/mesa/drivers/dri/i965/gen8_fs_generator.cpp   | 4 ++--
 src/mesa/drivers/dri/i965/gen8_generator.cpp      | 2 --
 src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp | 4 ++--
 3 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
index e550123..6793ce0 100644
--- a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
@@ -745,10 +745,10 @@ gen8_fs_generator::generate_code(exec_list *instructions)
          break;
 
       case BRW_OPCODE_F32TO16:
-         F32TO16(dst, src[0]);
+         MOV(retype(dst, BRW_REGISTER_TYPE_HF), src[0]);
          break;
       case BRW_OPCODE_F16TO32:
-         F16TO32(dst, src[0]);
+         MOV(dst, retype(src[0], BRW_REGISTER_TYPE_HF));
          break;
 
       case BRW_OPCODE_CMP:
diff --git a/src/mesa/drivers/dri/i965/gen8_generator.cpp b/src/mesa/drivers/dri/i965/gen8_generator.cpp
index 8a79701..6b11e9a 100644
--- a/src/mesa/drivers/dri/i965/gen8_generator.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_generator.cpp
@@ -154,8 +154,6 @@ ALU2(ASR)
 ALU3(BFE)
 ALU2(BFI1)
 ALU3(BFI2)
-ALU1(F32TO16)
-ALU1(F16TO32)
 ALU1(BFREV)
 ALU1(CBIT)
 ALU2_ACCUMULATE(ADDC)
diff --git a/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp b/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
index 451da6e..314a6a4 100644
--- a/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
@@ -589,11 +589,11 @@ gen8_vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
       break;
 
    case BRW_OPCODE_F32TO16:
-      F32TO16(dst, src[0]);
+      MOV(retype(dst, BRW_REGISTER_TYPE_HF), src[0]);
       break;
 
    case BRW_OPCODE_F16TO32:
-      F16TO32(dst, src[0]);
+      MOV(dst, retype(src[0], BRW_REGISTER_TYPE_HF));
       break;
 
    case BRW_OPCODE_LRP:
-- 
1.8.4.2