[Mesa-dev] [PATCH 21/22] i965/fb/gen6: Use meta path for stencil blits

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/intel_fbo.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
index e43e18b..6f0d5fc 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -874,14 +874,7 @@ intel_blit_framebuffer(struct gl_context *ctx,
    if (!_mesa_check_conditional_render(ctx))
       return;
 
-   mask = brw_blorp_framebuffer(brw,
-                                srcX0, srcY0, srcX1, srcY1,
-                                dstX0, dstY0, dstX1, dstY1,
-                                mask, filter);
-   if (mask == 0x0)
-      return;
-
-   if (brw->gen >= 8 && (mask & GL_STENCIL_BUFFER_BIT)) {
+   if (mask & GL_STENCIL_BUFFER_BIT) {
       brw_meta_fbo_stencil_blit(brw_context(ctx),
                                 srcX0, srcY0, srcX1, srcY1,
                                 dstX0, dstY0, dstX1, dstY1);
@@ -890,6 +883,13 @@ intel_blit_framebuffer(struct gl_context *ctx,
          return;
    }
 
+   mask = brw_blorp_framebuffer(brw,
+                                srcX0, srcY0, srcX1, srcY1,
+                                dstX0, dstY0, dstX1, dstY1,
+                                mask, filter);
+   if (mask == 0x0)
+      return;
+
    /* Try using the BLT engine. */
    mask = intel_blit_framebuffer_with_blitter(ctx,
                                               srcX0, srcY0, srcX1, srcY1,
-- 
1.8.3.1