[Mesa-dev] [PATCH 01/19] i965: Pass brw into next_offset().
Matt Turner
mattst88 at gmail.com
Fri Jun 13 23:14:02 PDT 2014
From: Kenneth Graunke <kenneth at whitecape.org>
The new brw_inst API is going to require a brw pointer in order
to access fields (so it can do generation checks). Plumb it in now.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
src/mesa/drivers/dri/i965/brw_eu.h | 2 +-
src/mesa/drivers/dri/i965/brw_eu_compact.c | 6 +++---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 13 ++++++++-----
3 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 83f1eba..9f1a5fd 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -429,7 +429,7 @@ void brw_debug_compact_uncompact(struct brw_context *brw,
struct brw_instruction *uncompacted);
static inline int
-next_offset(void *store, int offset)
+next_offset(const struct brw_context *brw, void *store, int offset)
{
struct brw_instruction *insn =
(struct brw_instruction *)((char *)store + offset);
diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c b/src/mesa/drivers/dri/i965/brw_eu_compact.c
index 0560367..0ae3f2d 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_compact.c
@@ -808,7 +808,7 @@ brw_compact_instructions(struct brw_compile *p, int start_offset,
break;
}
- offset = next_offset(store, offset);
+ offset = next_offset(brw, store, offset);
}
/* p->nr_insn is counting the number of uncompacted instructions still, so
@@ -831,12 +831,12 @@ brw_compact_instructions(struct brw_compile *p, int start_offset,
while (start_offset + old_ip[offset / 8] * 8 != annotation[i].offset) {
assert(start_offset + old_ip[offset / 8] * 8 <
annotation[i].offset);
- offset = next_offset(store, offset);
+ offset = next_offset(brw, store, offset);
}
annotation[i].offset = start_offset + offset;
- offset = next_offset(store, offset);
+ offset = next_offset(brw, store, offset);
}
annotation[num_annotations].offset = p->next_insn_offset;
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 68b03b7..8f34b43 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -2371,9 +2371,11 @@ brw_find_next_block_end(struct brw_compile *p, int start_offset)
{
int offset;
void *store = p->store;
+ const struct brw_context *brw = p->brw;
- for (offset = next_offset(store, start_offset); offset < p->next_insn_offset;
- offset = next_offset(store, offset)) {
+ for (offset = next_offset(brw, store, start_offset);
+ offset < p->next_insn_offset;
+ offset = next_offset(brw, store, offset)) {
struct brw_instruction *insn = store + offset;
switch (insn->header.opcode) {
@@ -2403,8 +2405,9 @@ brw_find_loop_end(struct brw_compile *p, int start_offset)
/* Always start after the instruction (such as a WHILE) we're trying to fix
* up.
*/
- for (offset = next_offset(store, start_offset); offset < p->next_insn_offset;
- offset = next_offset(store, offset)) {
+ for (offset = next_offset(brw, store, start_offset);
+ offset < p->next_insn_offset;
+ offset = next_offset(brw, store, offset)) {
struct brw_instruction *insn = store + offset;
if (insn->header.opcode == BRW_OPCODE_WHILE) {
@@ -2433,7 +2436,7 @@ brw_set_uip_jip(struct brw_compile *p)
return;
for (offset = 0; offset < p->next_insn_offset;
- offset = next_offset(store, offset)) {
+ offset = next_offset(brw, store, offset)) {
struct brw_instruction *insn = store + offset;
if (insn->header.cmpt_control) {
--
1.8.3.2
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