[Mesa-dev] [PATCH 11/11] nvc0: fix dri3 prime buffer creation

[Ilia Mirkin]

Does nv50 need a similar fix? [BTW note that nv50 the chipset (not the
family), is unable to place memtype != 0 buffers into gart. nv84+ are
all fine.]

On Wed, Jun 18, 2014 at 11:27 PM, Axel Davy <axel.davy at ens.fr> wrote:
> From: Dave Airlie <airlied at gmail.com>
>
> We need to place shared buffers into GART.
>
> Signed-off-by: Dave Airlie <airlied at redhat.com>
> Reviewed-by: Axel Davy <axel.davy at ens.fr>
> ---
>  src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c b/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
> index 79c9390..2f3cba8 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
> @@ -296,7 +296,7 @@ nvc0_miptree_create(struct pipe_screen *pscreen,
>     }
>     bo_config.nvc0.tile_mode = mt->level[0].tile_mode;
>
> -   if (!bo_config.nvc0.memtype && pt->usage == PIPE_USAGE_STAGING)
> +   if (!bo_config.nvc0.memtype && (pt->usage == PIPE_USAGE_STAGING || pt->bind & PIPE_BIND_SHARED))
>        mt->base.domain = NOUVEAU_BO_GART;
>     else
>        mt->base.domain = NOUVEAU_BO_VRAM;
> --
> 1.9.1
>
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