[Mesa-dev] [PATCH 06/23] i965/disasm: Properly disassemble jump targets on Gen4-5.

[Kenneth Graunke]

Previously, our dissasembly for flow control instructions looked like:

0x00000040: else(8)         ip          65540D     { align16 switch };

It didn't print InstCount properly for ELSE/ENDIF, and didn't even
attempt to disassemble PopCount.

Now it looks like:

0x00000040: else(8)         Jump: 4     Pop: 1     { align16 switch };

which is much more readable.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 src/mesa/drivers/dri/i965/brw_disasm.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index 8966eda..7773ad9 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -1207,6 +1207,21 @@ brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
       } else {
          format(file, "JIP: %d", brw_inst_gen6_jump_count(brw, inst));
       }
+   } else if (brw->gen < 6 && (opcode == BRW_OPCODE_BREAK ||
+                               opcode == BRW_OPCODE_CONTINUE ||
+                               opcode == BRW_OPCODE_ELSE)) {
+      pad(file, 16);
+      format(file, "Jump: %d", brw_inst_gen4_jump_count(brw, inst));
+      pad(file, 32);
+      format(file, "Pop: %d", brw_inst_gen4_pop_count(brw, inst));
+   } else if (brw->gen < 6 && (opcode == BRW_OPCODE_IF ||
+                               opcode == BRW_OPCODE_IFF ||
+                               opcode == BRW_OPCODE_HALT)) {
+      pad(file, 16);
+      format(file, "Jump: %d", brw_inst_gen4_pop_count(brw, inst));
+   } else if (brw->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
+      pad(file, 16);
+      format(file, "Pop: %d", brw_inst_gen4_pop_count(brw, inst));
    } else if (opcode == BRW_OPCODE_JMPI) {
       format(file, " %d", brw_inst_imm_d(brw, inst));
    } else if (opcode_descs[opcode].nsrc == 3) {
-- 
2.0.0