[Mesa-dev] [PATCH 1/4] i965: Switch mapping modes for non-explicit-flush blit-temporary maps.

[Vedran Rodic]

Any reason why these patches are not applied in current GIT other than
lack of review? I was kind of hoping that maybe some of them can
impact Dota 2 perf, since it seems that Dota 2 is memory bandwidth
limited.

On Thu, Feb 27, 2014 at 11:53 PM, Eric Anholt <eric at anholt.net> wrote:
> On LLC, it should always be better to use a cached mapping than the GTT.
> On non-LLC, it seems pretty silly to try to optimize read performance for
> the INVALIDATE_RANGE_BIT case.  This will make the buffer_storage logic
> easier.
> ---
>  src/mesa/drivers/dri/i965/intel_buffer_objects.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
> index e6124dc..5bf4533 100644
> --- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
> +++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
> @@ -421,11 +421,11 @@ intel_bufferobj_map_range(struct gl_context * ctx,
>                                                               "range map",
>                                                               length + extra,
>                                                               alignment);
> -        if (!(access & GL_MAP_READ_BIT)) {
> -           drm_intel_gem_bo_map_gtt(intel_obj->range_map_bo[index]);
> -        } else {
> +        if (brw->has_llc) {
>             drm_intel_bo_map(intel_obj->range_map_bo[index],
>                              (access & GL_MAP_WRITE_BIT) != 0);
> +        } else {
> +           drm_intel_gem_bo_map_gtt(intel_obj->range_map_bo[index]);
>          }
>          obj->Mappings[index].Pointer =
>              intel_obj->range_map_bo[index]->virtual + extra;
> --
> 1.9.rc1
>
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