[Mesa-dev] [PATCH 0/5] Using MAC to optimize LRP on i965 gen < 6

[Juha-Pekka Heikkila]

v3:
I took out accumulator flag from backend_instruction::has_side_effects()
as Matt suggested and rebased my patches on top of master where had shown up 
Matt's patches which were overlapping a bit on dead code elimination.
This set does not do anything for the MACH anomaly on vec4_visitor::visit
and fs_visitor:::visit, I will reverify it and do something about it later 
if needed. I tried these on Ironlake maching and did not see any regression
on Piglit quick set.

v2:
Thanks Matt, Eric and Kenneth for the comments, I did rework my set to look
a bit different. I noticed Matt has partially overlapping set of patches about
dead code elimination and as for my set I did not have access this week
to Ironlake machine thus calling this 'RFC'y set. Kenneth, I think pedantic
is good :) I hope you don't mind I took your versions of commit messages
almost directly as I probably could not come up with anything better.

The biggest differences are that I moved the accumulator flag to
backend_instruction class which is accessible from both vec4 and fs. This
also allow to see the flag in scheduler easily via
backend_instruction::has_side_effects() as well as remove the switch/cases
for ADDC/SUBB/MACH from dead code elimination. Also the fs side should be
working now, this was anyhow almost cut'n'paste type thing. As for correctly
scheduling instructions has_side_effects returning true when writes_accumulator
is true seems to make everything ok without need to touch inside
calculate_deps()

I did run these new LRP pieces on my Ivybridge machine and with Piglit I don't
see any regressions on glsl tests. Next week I probably can try with Ironlake.

Juha-Pekka Heikkila (5):
  i965: Add writes_accumulator flag
  i965/vec4: Add support for the MAC instruction.
  i965/vec4: Change vec4_visitor::emit_lrp to use MAC for gen<6
  i965/fs: Add support for the MAC instruction.
  i965/fs: Change fs_visitor::emit_lrp to use MAC for gen<6

 src/mesa/drivers/dri/i965/brw_eu.h                 |  1 +
 src/mesa/drivers/dri/i965/brw_fs.cpp               | 27 +++++++++------
 src/mesa/drivers/dri/i965/brw_fs_generator.cpp     | 10 +++---
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp       | 11 +++---
 .../drivers/dri/i965/brw_schedule_instructions.cpp |  8 ++---
 src/mesa/drivers/dri/i965/brw_shader.h             |  1 +
 src/mesa/drivers/dri/i965/brw_vec4.cpp             | 17 +++------
 src/mesa/drivers/dri/i965/brw_vec4_generator.cpp   | 10 +++---
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp     | 40 ++++++++++++----------
 9 files changed, 61 insertions(+), 64 deletions(-)

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1.8.1.2