[Mesa-dev] [PATCH] i965/vec4: Don't trim writemasks of texture instructions.

[Matt Turner]

It was my understanding that the writemask works in SIMD4x2 mode for
texturing instructions and doesn't require a message header. Some bit of
this logic must be wrong, so disable it until it's understood.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76617
---
 src/mesa/drivers/dri/i965/brw_vec4.cpp | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 673086d..d7d649d 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -383,8 +383,10 @@ vec4_visitor::dead_code_eliminate()
          case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7:
             break;
          default:
-            progress = true;
-            inst->dst.writemask = write_mask;
+            if (!inst->is_tex()) {
+               progress = true;
+               inst->dst.writemask = write_mask;
+            }
             break;
          }
       }
-- 
1.8.3.2