[Mesa-dev] [PATCH] i965/vec4: Don't trim writemasks of texture instructions.

[Kenneth Graunke]

On 03/28/2014 04:58 PM, Matt Turner wrote:
> It was my understanding that the writemask works in SIMD4x2 mode for
> texturing instructions and doesn't require a message header. Some bit of
> this logic must be wrong, so disable it until it's understood.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76617
> ---
> v2: Base on master, rather than breaking commit.
> 
>  src/mesa/drivers/dri/i965/brw_vec4.cpp | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> index 4ae6020..32a3892 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> @@ -351,8 +351,10 @@ try_eliminate_instruction(vec4_instruction *inst, int new_writemask)
>        case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7:
>           break;
>        default:
> -         inst->dst.writemask = new_writemask;
> -         return true;
> +         if (!inst->is_tex()) {
> +            inst->dst.writemask = new_writemask;
> +            return true;
> +         }
>        }
>     }
>  
> 

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

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