[Mesa-dev] [PATCH 03/11] i965: Move has_hiz from the slice to the level.

Kenneth Graunke kenneth at whitecape.org
Thu May 1 15:57:28 PDT 2014


On 05/01/2014 02:21 PM, Eric Anholt wrote:
> The value depends only on the level, so no need to store the bool per slice.
> Shrinks intel_mipmap_slice from 24 bytes to 16, while slotting into an
> existing hole in intel_mipmap_level.

Huh.  I thought that we needed to disable HiZ for array slices that fell
on bad boundaries, due to the 11*j thing.

But you're right, the existing code sure doesn't seem to use it.

I'd like to see Chad's ack on this.

> ---
>  src/mesa/drivers/dri/i965/brw_blorp.cpp       |  2 +-
>  src/mesa/drivers/dri/i965/brw_misc_state.c    |  2 +-
>  src/mesa/drivers/dri/i965/intel_fbo.c         |  2 +-
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 27 ++++++++++++---------------
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 22 ++++++++++------------
>  5 files changed, 25 insertions(+), 30 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
> index 57ff30a..52ddaa6 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
> @@ -327,7 +327,7 @@ brw_hiz_op_params::brw_hiz_op_params(struct intel_mipmap_tree *mt,
>     x1 = depth.width;
>     y1 = depth.height;
>  
> -   assert(intel_miptree_slice_has_hiz(mt, level, layer));
> +   assert(intel_miptree_level_has_hiz(mt, level));
>  
>     switch (mt->format) {
>     case MESA_FORMAT_Z_UNORM16:       depth_format = BRW_DEPTHFORMAT_D16_UNORM; break;
> diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
> index a6b108b..e1c2bb1 100644
> --- a/src/mesa/drivers/dri/i965/brw_misc_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
> @@ -182,7 +182,7 @@ brw_get_depthstencil_tile_masks(struct intel_mipmap_tree *depth_mt,
>        intel_region_get_tile_masks(depth_mt->region,
>                                    &tile_mask_x, &tile_mask_y, false);
>  
> -      if (intel_miptree_slice_has_hiz(depth_mt, depth_level, depth_layer)) {
> +      if (intel_miptree_level_has_hiz(depth_mt, depth_level)) {
>           uint32_t hiz_tile_mask_x, hiz_tile_mask_y;
>           intel_region_get_tile_masks(depth_mt->hiz_mt->region,
>                                       &hiz_tile_mask_x, &hiz_tile_mask_y, false);
> diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
> index f58d7c8..ea46f1d 100644
> --- a/src/mesa/drivers/dri/i965/intel_fbo.c
> +++ b/src/mesa/drivers/dri/i965/intel_fbo.c
> @@ -887,7 +887,7 @@ intel_blit_framebuffer(struct gl_context *ctx,
>  bool
>  intel_renderbuffer_has_hiz(struct intel_renderbuffer *irb)
>  {
> -   return intel_miptree_slice_has_hiz(irb->mt, irb->mt_level, irb->mt_layer);
> +   return intel_miptree_level_has_hiz(irb->mt, irb->mt_level);
>  }
>  
>  bool
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index c24cfce..2d30606 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -1271,14 +1271,13 @@ intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw,
>  
>  /**
>   * Helper for intel_miptree_alloc_hiz() that sets
> - * \c mt->level[level].slice[layer].has_hiz. Return true if and only if
> + * \c mt->level[level].has_hiz. Return true if and only if
>   * \c has_hiz was set.
>   */
>  static bool
> -intel_miptree_slice_enable_hiz(struct brw_context *brw,
> +intel_miptree_level_enable_hiz(struct brw_context *brw,
>                                 struct intel_mipmap_tree *mt,
> -                               uint32_t level,
> -                               uint32_t layer)
> +                               uint32_t level)
>  {
>     assert(mt->hiz_mt);
>  
> @@ -1297,7 +1296,7 @@ intel_miptree_slice_enable_hiz(struct brw_context *brw,
>        }
>     }
>  
> -   mt->level[level].slice[layer].has_hiz = true;
> +   mt->level[level].has_hiz = true;
>     return true;
>  }
>  
> @@ -1326,10 +1325,10 @@ intel_miptree_alloc_hiz(struct brw_context *brw,
>     /* Mark that all slices need a HiZ resolve. */
>     struct intel_resolve_map *head = &mt->hiz_map;
>     for (int level = mt->first_level; level <= mt->last_level; ++level) {
> -      for (int layer = 0; layer < mt->level[level].depth; ++layer) {
> -         if (!intel_miptree_slice_enable_hiz(brw, mt, level, layer))
> -            continue;
> +      if (!intel_miptree_level_enable_hiz(brw, mt, level))
> +         continue;
>  
> +      for (int layer = 0; layer < mt->level[level].depth; ++layer) {
>  	 head->next = malloc(sizeof(*head->next));
>  	 head->next->prev = head;
>  	 head->next->next = NULL;
> @@ -1348,12 +1347,10 @@ intel_miptree_alloc_hiz(struct brw_context *brw,
>   * Does the miptree slice have hiz enabled?
>   */
>  bool
> -intel_miptree_slice_has_hiz(struct intel_mipmap_tree *mt,
> -                            uint32_t level,
> -                            uint32_t layer)
> +intel_miptree_level_has_hiz(struct intel_mipmap_tree *mt, uint32_t level)
>  {
> -   intel_miptree_check_level_layer(mt, level, layer);
> -   return mt->level[level].slice[layer].has_hiz;
> +   intel_miptree_check_level_layer(mt, level, 0);
> +   return mt->level[level].has_hiz;
>  }
>  
>  void
> @@ -1361,7 +1358,7 @@ intel_miptree_slice_set_needs_hiz_resolve(struct intel_mipmap_tree *mt,
>  					  uint32_t level,
>  					  uint32_t layer)
>  {
> -   if (!intel_miptree_slice_has_hiz(mt, level, layer))
> +   if (!intel_miptree_level_has_hiz(mt, level))
>        return;
>  
>     intel_resolve_map_set(&mt->hiz_map,
> @@ -1374,7 +1371,7 @@ intel_miptree_slice_set_needs_depth_resolve(struct intel_mipmap_tree *mt,
>                                              uint32_t level,
>                                              uint32_t layer)
>  {
> -   if (!intel_miptree_slice_has_hiz(mt, level, layer))
> +   if (!intel_miptree_level_has_hiz(mt, level))
>        return;
>  
>     intel_resolve_map_set(&mt->hiz_map,
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> index c46df17..3e5bb66 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> @@ -121,6 +121,15 @@ struct intel_mipmap_level
>     GLuint depth;
>  
>     /**
> +    * \brief Is HiZ enabled for this level?
> +    *
> +    * If \c mt->level[l].has_hiz is set, then (1) \c mt->hiz_mt has been
> +    * allocated and (2) the HiZ memory for the slices in this level reside at
> +    * \c mt->hiz_mt->level[l].
> +    */
> +   bool has_hiz;
> +
> +   /**
>      * \brief List of 2D images in this mipmap level.
>      *
>      * This may be a list of cube faces, array slices in 2D array texture, or
> @@ -149,15 +158,6 @@ struct intel_mipmap_level
>         * intel_miptree_map/unmap on this slice.
>         */
>        struct intel_miptree_map *map;
> -
> -      /**
> -       * \brief Is HiZ enabled for this slice?
> -       *
> -       * If \c mt->level[l].slice[s].has_hiz is set, then (1) \c mt->hiz_mt
> -       * has been allocated and (2) the HiZ memory corresponding to this slice
> -       * resides at \c mt->hiz_mt->level[l].slice[s].
> -       */
> -      bool has_hiz;
>     } *slice;
>  };
>  
> @@ -579,9 +579,7 @@ intel_miptree_alloc_hiz(struct brw_context *brw,
>  			struct intel_mipmap_tree *mt);
>  
>  bool
> -intel_miptree_slice_has_hiz(struct intel_mipmap_tree *mt,
> -                            uint32_t level,
> -                            uint32_t layer);
> +intel_miptree_level_has_hiz(struct intel_mipmap_tree *mt, uint32_t level);
>  
>  void
>  intel_miptree_slice_set_needs_hiz_resolve(struct intel_mipmap_tree *mt,
> 


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