[Mesa-dev] [PATCH 1/8] i965/fs: Add plumbing for communicating single program flow.
Matt Turner
mattst88 at gmail.com
Tue May 6 18:38:30 PDT 2014
And do blorp at the same time.
---
src/mesa/drivers/dri/i965/brw_blorp.h | 6 ++++++
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 10 +++++++---
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 3 ++-
src/mesa/drivers/dri/i965/brw_context.h | 1 +
src/mesa/drivers/dri/i965/brw_fs.cpp | 6 ++++--
src/mesa/drivers/dri/i965/brw_fs.h | 9 ++++++---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 8 +++++---
src/mesa/drivers/dri/i965/gen8_fs_generator.cpp | 10 ++++++----
9 files changed, 38 insertions(+), 17 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index 15a7a0b..b217451 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -202,6 +202,12 @@ struct brw_blorp_prog_data
unsigned int first_curbe_grf;
/**
+ * True if the WM program contains control flow instructions. Used to
+ * enable single program flow.
+ */
+ bool has_control_flow;
+
+ /**
* True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
* than one sample per pixel.
*/
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 300ff5c..3f1a7bc 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -901,7 +901,7 @@ brw_blorp_blit_program::compile(struct brw_context *brw,
*/
render_target_write();
- return get_program(program_size, dump_file);
+ return get_program(program_size, &prog_data.has_control_flow, dump_file);
}
void
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
index 38969d8..4063c63 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
@@ -37,16 +37,20 @@ brw_blorp_eu_emitter::~brw_blorp_eu_emitter()
}
const unsigned *
-brw_blorp_eu_emitter::get_program(unsigned *program_size, FILE *dump_file)
+brw_blorp_eu_emitter::get_program(unsigned *program_size,
+ bool *has_control_flow,
+ FILE *dump_file)
{
const unsigned *res;
if (unlikely(INTEL_DEBUG & DEBUG_BLORP)) {
fprintf(stderr, "Native code for BLORP blit:\n");
- res = generator.generate_assembly(NULL, &insts, program_size, dump_file);
+ res = generator.generate_assembly(NULL, &insts, program_size,
+ has_control_flow, dump_file);
fprintf(stderr, "\n");
} else {
- res = generator.generate_assembly(NULL, &insts, program_size);
+ res = generator.generate_assembly(NULL, &insts, program_size,
+ has_control_flow);
}
return res;
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h
index c10695e..386ddbb 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h
@@ -33,7 +33,8 @@ protected:
explicit brw_blorp_eu_emitter(struct brw_context *brw);
~brw_blorp_eu_emitter();
- const unsigned *get_program(unsigned *program_size, FILE *dump_file);
+ const unsigned *get_program(unsigned *program_size, bool *has_control_flow,
+ FILE *dump_file);
void emit_kill_if_outside_rect(const struct brw_reg &x,
const struct brw_reg &y,
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 82b38fc..18149b5 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -395,6 +395,7 @@ struct brw_wm_prog_data {
bool dual_src_blend;
bool uses_pos_offset;
bool uses_omask;
+ bool has_control_flow;
uint32_t prog_offset_16;
/**
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index c550c41..8b7a77f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -3200,11 +3200,13 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c,
if (brw->gen >= 8) {
gen8_fs_generator g(brw, c, prog, fp, v.do_dual_src);
assembly = g.generate_assembly(&v.instructions, simd16_instructions,
- final_assembly_size);
+ final_assembly_size,
+ &c->prog_data.has_control_flow);
} else {
fs_generator g(brw, c, prog, fp, v.do_dual_src);
assembly = g.generate_assembly(&v.instructions, simd16_instructions,
- final_assembly_size);
+ final_assembly_size,
+ &c->prog_data.has_control_flow);
}
if (unlikely(brw->perf_debug) && shader) {
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 24d995b..903eab4 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -584,10 +584,12 @@ public:
const unsigned *generate_assembly(exec_list *simd8_instructions,
exec_list *simd16_instructions,
unsigned *assembly_size,
+ bool *has_control_flow,
FILE *dump_file = NULL);
private:
- void generate_code(exec_list *instructions, FILE *dump_file);
+ void generate_code(exec_list *instructions, bool *has_control_flow,
+ FILE *dump_file);
void generate_fb_write(fs_inst *inst);
void generate_blorp_fb_write(fs_inst *inst);
void generate_pixel_xy(struct brw_reg dst, bool is_x);
@@ -707,10 +709,11 @@ public:
const unsigned *generate_assembly(exec_list *simd8_instructions,
exec_list *simd16_instructions,
- unsigned *assembly_size);
+ unsigned *assembly_size,
+ bool *has_control_flow);
private:
- void generate_code(exec_list *instructions);
+ void generate_code(exec_list *instructions, bool *has_control_flow);
void generate_fb_write(fs_inst *inst);
void generate_linterp(fs_inst *inst, struct brw_reg dst,
struct brw_reg *src);
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index ff85171..ae89a50 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -1318,7 +1318,8 @@ fs_generator::generate_untyped_surface_read(fs_inst *inst, struct brw_reg dst,
}
void
-fs_generator::generate_code(exec_list *instructions, FILE *dump_file)
+fs_generator::generate_code(exec_list *instructions, bool *has_control_flow,
+ FILE *dump_file)
{
int last_native_insn_offset = p->next_insn_offset;
const char *last_annotation_string = NULL;
@@ -1845,13 +1846,14 @@ const unsigned *
fs_generator::generate_assembly(exec_list *simd8_instructions,
exec_list *simd16_instructions,
unsigned *assembly_size,
+ bool *has_control_flow,
FILE *dump_file)
{
assert(simd8_instructions || simd16_instructions);
if (simd8_instructions) {
dispatch_width = 8;
- generate_code(simd8_instructions, dump_file);
+ generate_code(simd8_instructions, has_control_flow, dump_file);
}
if (simd16_instructions) {
@@ -1872,7 +1874,7 @@ fs_generator::generate_assembly(exec_list *simd8_instructions,
brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED);
dispatch_width = 16;
- generate_code(simd16_instructions, dump_file);
+ generate_code(simd16_instructions, has_control_flow, dump_file);
}
return brw_get_program(p, assembly_size);
diff --git a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
index 7fb81c7..7009c6b 100644
--- a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
@@ -830,7 +830,8 @@ gen8_fs_generator::generate_unpack_half_2x16_split(fs_inst *inst,
}
void
-gen8_fs_generator::generate_code(exec_list *instructions)
+gen8_fs_generator::generate_code(exec_list *instructions,
+ bool *has_control_flow)
{
int last_native_inst_offset = next_inst_offset;
const char *last_annotation_string = NULL;
@@ -1284,13 +1285,14 @@ gen8_fs_generator::generate_code(exec_list *instructions)
const unsigned *
gen8_fs_generator::generate_assembly(exec_list *simd8_instructions,
exec_list *simd16_instructions,
- unsigned *assembly_size)
+ unsigned *assembly_size,
+ bool *has_control_flow)
{
assert(simd8_instructions || simd16_instructions);
if (simd8_instructions) {
dispatch_width = 8;
- generate_code(simd8_instructions);
+ generate_code(simd8_instructions, has_control_flow);
}
if (simd16_instructions) {
@@ -1302,7 +1304,7 @@ gen8_fs_generator::generate_assembly(exec_list *simd8_instructions,
c->prog_data.prog_offset_16 = nr_inst * sizeof(gen8_instruction);
dispatch_width = 16;
- generate_code(simd16_instructions);
+ generate_code(simd16_instructions, has_control_flow);
}
*assembly_size = next_inst_offset;
--
1.8.3.2
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