[Mesa-dev] [PATCH 3/8] i965/fs: Enable SPF when the shader contains no control flow.

[Matt Turner]

---
 src/mesa/drivers/dri/i965/gen6_wm_state.c | 5 +++++
 src/mesa/drivers/dri/i965/gen7_wm_state.c | 5 +++++
 src/mesa/drivers/dri/i965/gen8_ps_state.c | 5 +++++
 3 files changed, 15 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index 22e0925..0c7e12b 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -151,6 +151,11 @@ upload_wm_state(struct brw_context *brw)
    dw2 |= ((brw->wm.prog_data->base.binding_table.size_bytes / 4) <<
            GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT);
 
+   /* Enable single program flow mode to save power if the program doesn't
+    * contain any control flow instructions.
+    */
+   dw2 |= !brw->wm.prog_data->has_control_flow ? GEN6_WM_SPF_MODE : 0;
+
    dw5 |= (brw->max_wm_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT;
 
    /* CACHE_NEW_WM_PROG */
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index 71535a5..575d321 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -171,6 +171,11 @@ upload_ps_state(struct brw_context *brw)
    if (ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT] == NULL)
       dw2 |= GEN7_PS_FLOATING_POINT_MODE_ALT;
 
+   /* Enable single program flow mode to save power if the program doesn't
+    * contain any control flow instructions.
+    */
+   dw2 |= !brw->wm.prog_data->has_control_flow ? GEN7_PS_SPF_MODE : 0;
+
    /* Haswell requires the sample mask to be set in this packet as well as
     * in 3DSTATE_SAMPLE_MASK; the values should match. */
    /* _NEW_BUFFERS, _NEW_MULTISAMPLE */
diff --git a/src/mesa/drivers/dri/i965/gen8_ps_state.c b/src/mesa/drivers/dri/i965/gen8_ps_state.c
index 7d8f954..63883f8 100644
--- a/src/mesa/drivers/dri/i965/gen8_ps_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_ps_state.c
@@ -145,6 +145,11 @@ upload_ps_state(struct brw_context *brw)
    /* CACHE_NEW_WM_PROG */
    gen8_upload_constant_state(brw, &brw->wm.base, true, _3DSTATE_CONSTANT_PS);
 
+   /* Enable single program flow mode to save power if the program doesn't
+    * contain any control flow instructions.
+    */
+   dw3 |= !brw->wm.prog_data->has_control_flow ? GEN7_PS_SPF_MODE : 0;
+
    /* Initialize the execution mask with VMask.  Otherwise, derivatives are
     * incorrect for subspans where some of the pixels are unlit.  We believe
     * the bit just didn't take effect in previous generations.
-- 
1.8.3.2