[Mesa-dev] [PATCH 1/4] i965/Gen7: Set up layer constraints properly for renderbuffers
Chris Forbes
chrisf at ijw.co.nz
Wed May 7 22:21:33 PDT 2014
There were a few problems here, which mostly just broke layered
rendering into a view:
- Render target view extent was always set to be == depth. This is
benign for non-layered-rendering, but allows writes off the end of the
render target for layered rendering, which ends badly.
- Layered rendering did not honor the mt_layer setting, so would not
properly handle MinLayer being set on a view.
Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 17 +++++++----------
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index d71a1d1..e365860 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -454,9 +454,11 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb));
uint32_t surftype;
bool is_array = false;
- int depth = MAX2(rb->Depth, 1);
- int min_array_element;
+ int depth = irb->layer_count;
const uint8_t mocs = GEN7_MOCS_L3;
+
+ int min_array_element = irb->mt_layer / MAX2(mt->num_samples, 1);
+
GLenum gl_target = rb->TexImage ?
rb->TexImage->TexObject->Target : GL_TEXTURE_2D;
@@ -486,20 +488,15 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
is_array = true;
depth *= 6;
break;
+ case GL_TEXTURE_3D:
+ depth = rb->Depth;
+ /* fallthrough */
default:
surftype = translate_tex_target(gl_target);
is_array = _mesa_tex_target_is_array(gl_target);
break;
}
- if (layered) {
- min_array_element = 0;
- } else if (irb->mt->num_samples > 1) {
- min_array_element = irb->mt_layer / irb->mt->num_samples;
- } else {
- min_array_element = irb->mt_layer;
- }
-
surf[0] = surftype << BRW_SURFACE_TYPE_SHIFT |
format << BRW_SURFACE_FORMAT_SHIFT |
(irb->mt->array_spacing_lod0 ? GEN7_SURFACE_ARYSPC_LOD0
--
1.9.2
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