[Mesa-dev] [PATCH] i965/gen8: Set depth extent field

[Chris Forbes]

Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>

On Wed, May 14, 2014 at 6:19 AM, Jordan Justen
<jordan.l.justen at intel.com> wrote:
> The depth extent field is used to limit the allowed slice range that
> can be rendered to.
>
> With the previous setting, only slice 0 could be rendered.
>
> This fixes piglit amd_vertex_shader_layer-layered-depth-texture-render.
>
> Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
> ---
>  src/mesa/drivers/dri/i965/gen8_depth_state.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c
> index 31d6d56..a5c48b7 100644
> --- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
> +++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
> @@ -75,7 +75,7 @@ emit_depth_packets(struct brw_context *brw,
>     OUT_BATCH(((width - 1) << 4) | ((height - 1) << 18) | lod);
>     OUT_BATCH(((depth - 1) << 21) | (min_array_element << 10) | BDW_MOCS_WB);
>     OUT_BATCH(0);
> -   OUT_BATCH(depth_mt ? depth_mt->qpitch >> 2 : 0);
> +   OUT_BATCH(((depth - 1) << 21) | (depth_mt ? depth_mt->qpitch >> 2 : 0));
>     ADVANCE_BATCH();
>
>     if (!hiz) {
> --
> 1.9.1
>
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