[Mesa-dev] [PATCH 20/23] i965/fs: Loop over instruction lists and generate code.

[Matt Turner]

Small code reduction. Will let us move the program header code into a
common place in generate_assembly().
---
 src/mesa/drivers/dri/i965/brw_fs_generator.cpp  | 56 ++++++++++---------------
 src/mesa/drivers/dri/i965/gen8_fs_generator.cpp | 46 +++++++++-----------
 2 files changed, 42 insertions(+), 60 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 914fb29..bae39c1 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -1825,45 +1825,35 @@ fs_generator::generate_assembly(exec_list *simd8_instructions,
    assert(simd8_instructions || simd16_instructions);
 
    const struct gl_program *prog = fp ? &fp->Base : NULL;
+   exec_list *instructions[] = { simd8_instructions, simd16_instructions };
 
-   if (simd8_instructions) {
-      struct annotation *annotation;
-      int num_annotations;
+   for (unsigned i = 0; i < ARRAY_SIZE(instructions); i++) {
+      if (instructions[i]) {
+         if (i == 1) {
+            /* align to 64 byte boundary. */
+            while (p->next_insn_offset % 64) {
+               brw_NOP(p);
+            }
 
-      dispatch_width = 8;
-      generate_code(simd8_instructions, &num_annotations, &annotation);
-      brw_compact_instructions(p, 0, num_annotations, annotation);
+            /* Save off the start of this SIMD16 program */
+            prog_data->prog_offset_16 = p->next_insn_offset;
 
-      if (unlikely(debug_flag)) {
-         dump_assembly(p->store, num_annotations, annotation, brw, prog,
-                       brw_disassemble);
-         ralloc_free(annotation);
-      }
-   }
-
-   if (simd16_instructions) {
-      /* align to 64 byte boundary. */
-      while (p->next_insn_offset % 64) {
-         brw_NOP(p);
-      }
-
-      /* Save off the start of this SIMD16 program */
-      prog_data->prog_offset_16 = p->next_insn_offset;
-
-      brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED);
+            brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED);
+         }
 
-      struct annotation *annotation;
-      int num_annotations;
+         struct annotation *annotation;
+         int num_annotations;
 
-      dispatch_width = 16;
-      generate_code(simd16_instructions, &num_annotations, &annotation);
-      brw_compact_instructions(p, prog_data->prog_offset_16,
-                               num_annotations, annotation);
+         dispatch_width = (i + 1) * 8;
+         generate_code(instructions[i], &num_annotations, &annotation);
+         brw_compact_instructions(p, prog_data->prog_offset_16,
+                                  num_annotations, annotation);
 
-      if (unlikely(debug_flag)) {
-         dump_assembly(p->store, num_annotations, annotation, brw, prog,
-                       brw_disassemble);
-         ralloc_free(annotation);
+         if (unlikely(debug_flag)) {
+            dump_assembly(p->store, num_annotations, annotation, brw, prog,
+                          brw_disassemble);
+            ralloc_free(annotation);
+         }
       }
    }
 
diff --git a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
index 272f668..f498cd5 100644
--- a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
@@ -1314,38 +1314,30 @@ gen8_fs_generator::generate_assembly(exec_list *simd8_instructions,
 {
    assert(simd8_instructions || simd16_instructions);
 
-   if (simd8_instructions) {
-      struct annotation *annotation;
-      int num_annotations;
+   exec_list *instructions[] = { simd8_instructions, simd16_instructions };
 
-      dispatch_width = 8;
-      generate_code(simd8_instructions, &num_annotations, &annotation);
+   for (unsigned i = 0; i < ARRAY_SIZE(instructions); i++) {
+      if (instructions[i]) {
+         if (i == 1) {
+            /* Align to a 64-byte boundary. */
+            while (next_inst_offset % 64)
+               NOP();
 
-      if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
-         dump_assembly(store, num_annotations, annotation, brw, prog,
-                       gen8_disassemble);
-         ralloc_free(annotation);
-      }
-   }
-
-   if (simd16_instructions) {
-      /* Align to a 64-byte boundary. */
-      while (next_inst_offset % 64)
-         NOP();
-
-      /* Save off the start of this SIMD16 program */
-      prog_data->prog_offset_16 = next_inst_offset;
+            /* Save off the start of this SIMD16 program */
+            prog_data->prog_offset_16 = next_inst_offset;
+         }
 
-      struct annotation *annotation;
-      int num_annotations;
+         struct annotation *annotation;
+         int num_annotations;
 
-      dispatch_width = 16;
-      generate_code(simd16_instructions, &num_annotations, &annotation);
+         dispatch_width = (i + 1) * 8;
+         generate_code(instructions[i], &num_annotations, &annotation);
 
-      if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
-         dump_assembly(store, num_annotations, annotation, brw, prog,
-                       gen8_disassemble);
-         ralloc_free(annotation);
+         if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
+            dump_assembly(store, num_annotations, annotation, brw, prog,
+                          gen8_disassemble);
+            ralloc_free(annotation);
+         }
       }
    }
 
-- 
1.8.3.2