[Mesa-dev] [PATCH 10/14] i965: Merge common members of visitors
Topi Pohjolainen
topi.pohjolainen at intel.com
Wed May 28 05:36:06 PDT 2014
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
src/mesa/drivers/dri/i965/brw_fs.h | 12 ------------
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 7 -------
src/mesa/drivers/dri/i965/brw_shader.cpp | 9 ++++++++-
src/mesa/drivers/dri/i965/brw_shader.h | 16 ++++++++++++++++
src/mesa/drivers/dri/i965/brw_vec4.h | 12 ------------
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 8 --------
6 files changed, 24 insertions(+), 40 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 7b3ffbd..36bb7bf 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -486,19 +486,13 @@ public:
struct gl_fragment_program *fp;
const struct brw_wm_prog_key *const key;
struct brw_wm_prog_data *prog_data;
- unsigned int sanity_param_count;
int *param_size;
- int *virtual_grf_start;
- int *virtual_grf_end;
brw::fs_live_variables *live_intervals;
int *regs_live_at_ip;
- /** Number of uniform variable components visited. */
- unsigned uniforms;
-
/** Byte-offset for the next available spot in the scratch space buffer. */
unsigned last_scratch;
@@ -520,16 +514,10 @@ public:
unsigned output_components[BRW_MAX_DRAW_BUFFERS];
fs_reg dual_src_output;
bool do_dual_src;
- int first_non_payload_grf;
fs_reg *fp_temp_regs;
fs_reg *fp_input_regs;
- /** @{ debug annotation info */
- const char *current_annotation;
- const void *base_ir;
- /** @} */
-
bool simd16_unsupported;
char *no16_msg;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index b78a8d2..aa1249b 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2978,17 +2978,10 @@ fs_visitor::fs_visitor(struct brw_context *brw,
memset(this->output_components, 0, sizeof(this->output_components));
this->source_depth_to_render_target = false;
this->runtime_check_aads_emit = false;
- this->first_non_payload_grf = 0;
- this->current_annotation = NULL;
- this->base_ir = NULL;
-
- this->virtual_grf_start = NULL;
- this->virtual_grf_end = NULL;
this->live_intervals = NULL;
this->regs_live_at_ip = NULL;
- this->uniforms = 0;
this->last_scratch = 0;
this->pull_constant_loc = NULL;
this->push_constant_loc = NULL;
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 777d4aa..f21261c 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -561,11 +561,18 @@ backend_emitter::backend_emitter(struct brw_context *brw, void *mem_ctx,
failed(false),
stage_name(stage_name),
debug_flag(debug_flag),
+ uniforms(0),
+ sanity_param_count(0),
virtual_grf_sizes(0),
virtual_grf_count(0),
virtual_grf_array_size(0),
+ virtual_grf_start(NULL),
+ virtual_grf_end(NULL),
virtual_grf_reg_count(0),
- virtual_grf_reg_map(NULL)
+ virtual_grf_reg_map(NULL),
+ base_ir(NULL),
+ current_annotation(NULL),
+ first_non_payload_grf(0)
{
}
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 9ae5873..a27f10c 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -139,9 +139,16 @@ public:
const char * const stage_name;
const bool debug_flag;
+ /** Number of uniform variable components visited. */
+ unsigned uniforms;
+
+ unsigned int sanity_param_count;
+
int *virtual_grf_sizes;
int virtual_grf_count;
int virtual_grf_array_size;
+ int *virtual_grf_start;
+ int *virtual_grf_end;
/**
* This is the size to be used for an array with an element per
@@ -151,6 +158,15 @@ public:
/** Per-virtual-grf indices into an array of size virtual_grf_reg_count */
int *virtual_grf_reg_map;
+ /**
+ * GLSL IR currently being processed, which is associated with our
+ * driver IR instructions for debugging purposes.
+ */
+ const void *base_ir;
+ const char *current_annotation;
+
+ int first_non_payload_grf;
+
virtual void dump_instruction(backend_instruction *inst) = 0;
virtual void dump_instructions();
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index dbf445f..6fe25fc 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -318,18 +318,7 @@ public:
struct brw_vec4_compile * const c;
const struct brw_vec4_prog_key * const key;
struct brw_vec4_prog_data * const prog_data;
- unsigned int sanity_param_count;
- /**
- * GLSL IR currently being processed, which is associated with our
- * driver IR instructions for debugging purposes.
- */
- const void *base_ir;
- const char *current_annotation;
-
- int first_non_payload_grf;
- int *virtual_grf_start;
- int *virtual_grf_end;
dst_reg userplane[MAX_CLIP_PLANES];
bool live_intervals_valid;
@@ -379,7 +368,6 @@ public:
int *uniform_size;
int *uniform_vector_size;
unsigned uniform_array_size; /*< Size of uniform_[vector_]size arrays */
- unsigned uniforms;
src_reg shader_start_time;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 4be1acf..ff9fc30 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -3300,24 +3300,16 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
c(c),
key(key),
prog_data(prog_data),
- sanity_param_count(0),
- first_non_payload_grf(0),
need_all_constants_in_pull_buffer(false),
no_spills(no_spills),
st_base(st_base),
st_written(st_written),
st_reset(st_reset)
{
- this->base_ir = NULL;
- this->current_annotation = NULL;
memset(this->output_reg_annotation, 0, sizeof(this->output_reg_annotation));
- this->virtual_grf_start = NULL;
- this->virtual_grf_end = NULL;
this->live_intervals_valid = false;
- this->uniforms = 0;
-
/* Initialize uniform_array_size to at least 1 because pre-gen6 VS requires
* at least one. See setup_uniforms() in brw_vec4.cpp.
*/
--
1.8.3.1
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