[Mesa-dev] [PATCH 12/19] i965/fs: Apply cube map array fixup and restore the payload.

[Chris Forbes]

Oh, ignore that -- I had misread your lowering code.

On Thu, May 29, 2014 at 9:40 AM, Chris Forbes <chrisf at ijw.co.nz> wrote:
> It looks like the special handling of sources[0] in lowering
> LOAD_PAYLOAD would break this -- or does it never see this?
>
> On Wed, May 28, 2014 at 1:47 PM, Matt Turner <mattst88 at gmail.com> wrote:
>> So that we don't have partial writes to a large VGRF. Will be cleaned up
>> by register coalescing.
>> ---
>>  src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 15 ++++++++++++++-
>>  1 file changed, 14 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
>> index 10ec254..b94141a 100644
>> --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
>> +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
>> @@ -1726,7 +1726,20 @@ fs_visitor::visit(ir_texture *ir)
>>            type->sampler_array) {
>>           fs_reg depth = dst;
>>           depth.reg_offset = 2;
>> -         emit_math(SHADER_OPCODE_INT_QUOTIENT, depth, depth, fs_reg(6));
>> +         fs_reg fixed_depth = fs_reg(this, glsl_type::int_type);
>> +         emit_math(SHADER_OPCODE_INT_QUOTIENT, fixed_depth, depth, fs_reg(6));
>> +
>> +         fs_reg *fixed_payload = ralloc_array(mem_ctx, fs_reg, inst->regs_written);
>> +         fs_reg d = dst;
>> +         for (int i = 0; i < inst->regs_written; i++) {
>> +            if (i == 2) {
>> +               fixed_payload[i] = fixed_depth;
>> +            } else {
>> +               d.reg_offset = i;
>> +               fixed_payload[i] = d;
>> +            }
>> +         }
>> +         emit(LOAD_PAYLOAD(dst, fixed_payload, inst->regs_written));
>>        }
>>     }
>>
>> --
>> 1.8.3.2
>>
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