[Mesa-dev] [RFC 0/9] i965/fs: Combine constants and unconditionally emit MADs

[Matt Turner]

On Fri, Oct 31, 2014 at 7:12 PM, Connor Abbott <cwabbott0 at gmail.com> wrote:
> On Fri, Oct 31, 2014 at 9:27 PM, Matt Turner <mattst88 at gmail.com> wrote:
>>    Probably a bottom-up instruction scheduling pass to help sink MOV-imm
>>       (Currently losing a bunch of SIMD16 programs, I expect because of
>>        this)
>
> Just wondering... what would a bottom-up scheduling pass do to help if
> we already try to shorten live ranges?

Good question. You're right that we do pre-register allocation
scheduling in order to shorten live ranges, but it works by scheduling
dependent instructions closer to the instructions that produced the
data they consume, rather than sinking producing instructions closer
to the consumers. I think a bottom-up instruction scheduling pass
would do that.

> Another way to help solve the
> problem might be to make the constant load insertion pass smarter
> about where it inserts the loads in the first place.

I think you're probably right. And simply decoupling handling
constants better from an improved instruction scheduler seems like a
good thing.

> Finally, if
> nothing else fixes the issue we might want to write something that
> (efficiently & intelligently) calculates the register pressure as
> we're walking the program (maybe we should walk it bottom-up and use
> the live-out sets?), and then don't insert the mov if it increases the
> register pressure in between the def and use above the magic number --
> we'll probably want something like this more once we go to SSA and get
> smarter about register allocation anyways.

Put it on the TODO list :)