[Mesa-dev] [PATCH V2] mesa: Permanently enable features supported by target CPU at compile time.

Emil Velikov emil.l.velikov at gmail.com
Sat Nov 8 10:25:52 PST 2014


On 08/11/14 08:35, Siavash Eliasi wrote:
> This will remove the need for unnecessary runtime checks for CPU features if
> already supported by target CPU, resulting in smaller and less branchy code.
> 
A comment I could not withheld based on your earlier post - "We require
micro-benchmark for this code. It will take me hours to find why mesa is
so slow now :P"

Ideally mesa should have an infrastructure/farm that handles regressions
- be that performance or otherwise. Pretty sure some companies have such
features but those seem to be hidden behind locked doors :'(

But on a more mature note, currently only cpu_has_xmm
(_tnl_generate_sse_emit) and cpu_has_sse4_1(vbo_get_minmax_index) are
actually useful, with the former of questionable amount :P

Can you confirm that it does not cause issues with "interesting" setups
such as https://bugs.freedesktop.org/show_bug.cgi?id=71547


Thanks
Emil

> V2:
> - Removed the SSSE3 related part for the not yet merged patch.
> - Avoiding redefinition of macros.
> ---
>  src/mesa/x86/common_x86_features.h | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/src/mesa/x86/common_x86_features.h b/src/mesa/x86/common_x86_features.h
> index 66f2cf6..65634aa 100644
> --- a/src/mesa/x86/common_x86_features.h
> +++ b/src/mesa/x86/common_x86_features.h
> @@ -59,13 +59,39 @@
>  #define X86_CPUEXT_3DNOW_EXT	(1<<30)
>  #define X86_CPUEXT_3DNOW	(1<<31)
>  
> +#ifdef __MMX__
> +#define cpu_has_mmx		1
> +#else
>  #define cpu_has_mmx		(_mesa_x86_cpu_features & X86_FEATURE_MMX)
> +#endif
> +
>  #define cpu_has_mmxext		(_mesa_x86_cpu_features & X86_FEATURE_MMXEXT)
> +
> +#ifdef __SSE__
> +#define cpu_has_xmm		1
> +#else
>  #define cpu_has_xmm		(_mesa_x86_cpu_features & X86_FEATURE_XMM)
> +#endif
> +
> +#ifdef __SSE2__
> +#define cpu_has_xmm2		1
> +#else
>  #define cpu_has_xmm2		(_mesa_x86_cpu_features & X86_FEATURE_XMM2)
> +#endif
> +
> +#ifdef __3dNOW__
> +#define cpu_has_3dnow		1
> +#else
>  #define cpu_has_3dnow		(_mesa_x86_cpu_features & X86_FEATURE_3DNOW)
> +#endif
> +
>  #define cpu_has_3dnowext	(_mesa_x86_cpu_features & X86_FEATURE_3DNOWEXT)
> +
> +#ifdef __SSE4_1__
> +#define cpu_has_sse4_1		1
> +#else
>  #define cpu_has_sse4_1		(_mesa_x86_cpu_features & X86_FEATURE_SSE4_1)
> +#endif
>  
>  #endif
>  
> 



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