[Mesa-dev] [PATCH v2 03/14] i965/gen8: Don't rely directly on the hiz miptree structure

[Ben Widawsky]

On Mon, Jul 21, 2014 at 11:00:52PM -0700, Jordan Justen wrote:
> We are still allocating a miptree for hiz, but we only use fields from
> intel_miptree_aux_buffer. This will allow us to switch over to not
> allocating a miptree.
> 
> Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
> Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> ---
>  src/mesa/drivers/dri/i965/gen8_depth_state.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c
> index b6f373d..8774595 100644
> --- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
> +++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
> @@ -89,10 +89,10 @@ emit_depth_packets(struct brw_context *brw,
>     } else {
>        BEGIN_BATCH(5);
>        OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (5 - 2));
> -      OUT_BATCH((depth_mt->hiz_buf->mt->pitch - 1) | BDW_MOCS_WB << 25);
> -      OUT_RELOC64(depth_mt->hiz_buf->mt->bo,
> +      OUT_BATCH((depth_mt->hiz_buf->pitch - 1) | BDW_MOCS_WB << 25);
> +      OUT_RELOC64(depth_mt->hiz_buf->bo,
>                    I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
> -      OUT_BATCH(depth_mt->hiz_buf->mt->qpitch >> 2);
> +      OUT_BATCH(depth_mt->hiz_buf->qpitch >> 2);
>        ADVANCE_BATCH();
>     }
>  
> -- 

I would have just combined this with patch 2.
Reviewed-by: Ben Widawsky <ben at bwidawsk.net>

-- 
Ben Widawsky, Intel Open Source Technology Center