[Mesa-dev] [PATCH 2/2] i965/vec4: Rewrite dead code elimination to use live in/out.

[Matt Turner]

On Sat, Nov 8, 2014 at 10:18 PM, Kenneth Graunke <kenneth at whitecape.org> wrote:
> On Monday, November 03, 2014 01:34:49 PM Matt Turner wrote:
>> +static bool
>> +can_do_writemask(const struct brw_context *brw,
>> +                 const vec4_instruction *inst)
>> +{
>> +   switch (inst->opcode) {
>> +   case SHADER_OPCODE_GEN4_SCRATCH_READ:
>> +   case VS_OPCODE_PULL_CONSTANT_LOAD:
>> +   case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7:
>> +      return false;
>> +   default:
>> +      /* The MATH instruction on Gen6 only executes in align1 mode, which does
>> +       * not support writemasking.
>> +       */
>> +      if (brw->gen == 6 && inst->is_math())
>> +         return false;
>> +
>> +      if (inst->is_tex())
>> +         return false;
>
> I'd feel a lot more confident in this function if it were:
>
> {
>    /* The MATH instruction on Gen6 only executes in align1 mode, which does
>     * not support writemasking.
>     */
>    if (brw->gen == 6 && inst->is_math())
>       return false;
>
>    return inst->mlen == 0;
> }

I like that too, but I noticed that VS_OPCODE_PULL_CONSTANT_LOAD_GEN7
doesn't set mlen. I guess that's just a bug?