[Mesa-dev] [PATCH 11/13] gallium/docs: Highlighting opcodes

Alexander Troosh trush at yandex.ru
Wed Oct 8 04:40:28 PDT 2014


---
 src/gallium/docs/source/tgsi.rst |   85 +++++++++++++++++++------------------
 1 files changed, 44 insertions(+), 41 deletions(-)

diff --git a/src/gallium/docs/source/tgsi.rst b/src/gallium/docs/source/tgsi.rst
index f795c59..9bfefd8 100644
--- a/src/gallium/docs/source/tgsi.rst
+++ b/src/gallium/docs/source/tgsi.rst
@@ -939,7 +939,7 @@ XXX doesn't look like most of the opcodes really belong here.
   filtering operation and packs them into a single register.  Only works with
   2D, 2D array, cubemaps, and cubemaps arrays.  For 2D textures, only the
   addressing modes of the sampler and the top level of any mip pyramid are
-  used. Set W to zero.  It behaves like the TEX instruction, but a filtered
+  used. Set W to zero.  It behaves like the :opcode:`TEX` instruction, but a filtered
   sample is not generated. The four samples that contribute to filtering are
   placed into xyzw in clockwise order, starting with the (u,v) texture
   coordinate delta at the following locations (-, +), (+, +), (+, -), (-, -),
@@ -1501,7 +1501,7 @@ GLSL ISA
 
 These opcodes are part of :term:`GLSL`'s opcode set. Support for these
 opcodes is determined by a special capability bit, ``GLSL``.
-Some require glsl version 1.30 (UIF/BREAKC/SWITCH/CASE/DEFAULT/ENDSWITCH).
+Some require glsl version 1.30 (:opcode:`UIF`/:opcode:`BREAKC`/:opcode:`SWITCH`/:opcode:`CASE`/:opcode:`DEFAULT`/:opcode:`ENDSWITCH`).
 
 .. opcode:: CAL - Subroutine Call
 
@@ -1521,22 +1521,22 @@ Some require glsl version 1.30 (UIF/BREAKC/SWITCH/CASE/DEFAULT/ENDSWITCH).
 .. opcode:: CONT - Continue
 
   Unconditionally moves the point of execution to the instruction after the
-  last bgnloop. The instruction must appear within a bgnloop/endloop.
+  last :opcode:`BGNLOOP`. The instruction must appear within a :opcode:`BGNLOOP`/:opcode:`ENDLOOP`.
 
 .. note::
 
-   Support for CONT is determined by a special capability bit,
+   Support for :opcode:`CONT` is determined by a special capability bit,
    ``TGSI_CONT_SUPPORTED``. See :ref:`Screen` for more information.
 
 
 .. opcode:: BGNLOOP - Begin a Loop
 
-  Start a loop. Must have a matching endloop.
+  Start a loop. Must have a matching :opcode:`ENDLOOP`.
 
 
 .. opcode:: BGNSUB - Begin Subroutine
 
-  Starts definition of a subroutine. Must have a matching endsub.
+  Starts definition of a subroutine. Must have a matching :opcode:`ENDSUB`.
 
 
 .. opcode:: ENDLOOP - End a Loop
@@ -1557,60 +1557,63 @@ Some require glsl version 1.30 (UIF/BREAKC/SWITCH/CASE/DEFAULT/ENDSWITCH).
 .. opcode:: BRK - Break
 
   Unconditionally moves the point of execution to the instruction after the
-  next endloop or endswitch. The instruction must appear within a loop/endloop
-  or switch/endswitch.
+  next :opcode:`ENDLOOP` or :opcode:`ENDSWITCH`. The instruction must appear within a :opcode:`BGNLOOP`/:opcode:`ENDLOOP`
+  or :opcode:`SWITCH`/:opcode:`ENDSWITCH`.
 
 
 .. opcode:: BREAKC - Break Conditional
 
   Conditionally moves the point of execution to the instruction after the
-  next endloop or endswitch. The instruction must appear within a loop/endloop
-  or switch/endswitch.
-  Condition evaluates to true if src0.x != 0 where src0.x is interpreted
-  as an integer register.
+  next :opcode:`ENDLOOP` or :opcode:`ENDSWITCH`. The instruction must appear within a :opcode:`BGNLOOP`/:opcode:`ENDLOOP`
+  or :opcode:`SWITCH`/:opcode:`ENDSWITCH`.
+  Condition evaluates to true if
+
+    src0.x != 0
+
+  where ``src0.x`` is interpreted as an integer register.
 
 .. note::
 
    Considered for removal as it's quite inconsistent wrt other opcodes
-   (could emulate with UIF/BRK/ENDIF). 
+   (could emulate with :opcode:`UIF`/:opcode:`BRK`/:opcode:`ENDIF`).
 
 
 .. opcode:: IF - Float If
 
-  Start an IF ... ELSE .. ENDIF block.  Condition evaluates to true if
+  Start an :opcode:`IF` ... :opcode:`ELSE`... :opcode:`ENDIF` block.  Condition evaluates to true if
 
     src0.x != 0.0
 
-  where src0.x is interpreted as a floating point register.
+  where ``src0.x`` is interpreted as a floating point register.
 
 
 .. opcode:: UIF - Bitwise If
 
-  Start an UIF ... ELSE .. ENDIF block. Condition evaluates to true if
+  Start an :opcode:`UIF` ... :opcode:`ELSE` ... :opcode:`ENDIF` block. Condition evaluates to true if
 
     src0.x != 0
 
-  where src0.x is interpreted as an integer register.
+  where ``src0.x`` is interpreted as an integer register.
 
 
 .. opcode:: ELSE - Else
 
-  Starts an else block, after an IF or UIF statement.
+  Starts an else block, after an :opcode:`IF` or :opcode:`UIF` statement.
 
 
 .. opcode:: ENDIF - End If
 
-  Ends an IF or UIF block.
+  Ends an :opcode:`IF` or :opcode:`UIF` block.
 
 
 .. opcode:: SWITCH - Switch
 
    Starts a C-style switch expression. The switch consists of one or multiple
-   CASE statements, and at most one DEFAULT statement. Execution of a statement
-   ends when a BRK is hit, but just like in C falling through to other cases
-   without a break is allowed. Similarly, DEFAULT label is allowed anywhere not
+   :opcode:`CASE` statements, and at most one :opcode:`DEFAULT` statement. Execution of a statement
+   ends when a :opcode:`BRK` is hit, but just like in C falling through to other cases
+   without a break is allowed. Similarly, :opcode:`DEFAULT` label is allowed anywhere not
    just as last statement, and fallthrough is allowed into/from it.
-   CASE src arguments are evaluated at bit level against the SWITCH src argument.
+   :opcode:`CASE` src arguments are evaluated at bit level against the :opcode:`SWITCH` src argument.
 
    Example::
 
@@ -1796,7 +1799,7 @@ Resource Sampling Opcodes
 
 Those opcodes follow very closely semantics of the respective Direct3D
 instructions. If in doubt double check Direct3D documentation.
-Note that the swizzle on SVIEW (src1) determines texel swizzling
+Note that the swizzle on ``SVIEW (src1)`` determines texel swizzling
 after lookup.
 
 .. opcode:: SAMPLE - Sample data from the specified texture
@@ -1811,7 +1814,7 @@ after lookup.
 
 .. opcode:: SAMPLE_I -
 
-  Simplified alternative to the SAMPLE instruction.  Using the provided
+  Simplified alternative to the :opcode:`SAMPLE` instruction.  Using the provided
   integer address, SAMPLE_I fetches data from the specified sampler view
   without any filtering.  The source data may come from any resource type
   other than CUBE.
@@ -1823,7 +1826,7 @@ after lookup.
   The 'address' is specified as unsigned integers. If the 'address' is out of
   range [0...(# texels - 1)] the result of the fetch is always 0 in all
   components.  As such the instruction doesn't honor address wrap modes, in
-  cases where that behavior is desirable 'SAMPLE' instruction should be used.
+  cases where that behavior is desirable :opcode:`SAMPLE` instruction should be used.
   address.w always provides an unsigned integer mipmap level. If the value is
   out of the range then the instruction always returns 0 in all components.
   address.yz are ignored for buffers and 1d textures.  address.z is ignored
@@ -1860,13 +1863,13 @@ after lookup.
 
 .. opcode:: SAMPLE_I_MS -
 
-  Just like SAMPLE_I but allows fetch data from multi-sampled surfaces.
+  Just like :opcode:`SAMPLE_I` but allows fetch data from multi-sampled surfaces.
 
   Syntax: ``SAMPLE_I_MS dst, address, sampler_view, sample``
 
 .. opcode:: SAMPLE_B -
 
-  Just like the SAMPLE instruction with the exception that an additional bias
+  Just like the :opcode:`SAMPLE` instruction with the exception that an additional bias
   is applied to the level of detail computed as part of the instruction
   execution.
 
@@ -1876,10 +1879,10 @@ after lookup.
 
 .. opcode:: SAMPLE_C -
 
-  Similar to the SAMPLE instruction but it performs a comparison filter. The
-  operands to SAMPLE_C are identical to SAMPLE, except that there is an
+  Similar to the :opcode:`SAMPLE` instruction but it performs a comparison filter. The
+  operands to :opcode:`SAMPLE_C` are identical to :opcode:`SAMPLE`, except that there is an
   additional float32 operand, reference value, which must be a register with
-  single-component, or a scalar literal.  SAMPLE_C makes the hardware use the
+  single-component, or a scalar literal.  :opcode:`SAMPLE_C` makes the hardware use the
   current samplers compare_func (in pipe_sampler_state) to compare reference
   value against the red component value for the surce resource at each texel
   that the currently configured texture filter covers based on the provided
@@ -1891,7 +1894,7 @@ after lookup.
 
 .. opcode:: SAMPLE_C_LZ -
 
-  Same as SAMPLE_C, but LOD is 0 and derivatives are ignored. The LZ stands
+  Same as :opcode:`SAMPLE_C`, but LOD is 0 and derivatives are ignored. The LZ stands
   for level-zero.
 
   Syntax: ``SAMPLE_C_LZ dst, address, sampler_view.r, sampler, ref_value``
@@ -1901,7 +1904,7 @@ after lookup.
 
 .. opcode:: SAMPLE_D -
 
-  SAMPLE_D is identical to the SAMPLE opcode except that the derivatives for
+  :opcode:`SAMPLE_D` is identical to the :opcode:`SAMPLE` opcode except that the derivatives for
   the source address in the x direction and the y direction are provided by
   extra parameters.
 
@@ -1911,7 +1914,7 @@ after lookup.
 
 .. opcode:: SAMPLE_L -
 
-  SAMPLE_L is identical to the SAMPLE opcode except that the LOD is provided
+  :opcode:`SAMPLE_L` is identical to the :opcode:`SAMPLE` opcode except that the LOD is provided
   directly as a scalar value, representing no anisotropy.
 
   Syntax: ``SAMPLE_L dst, address, sampler_view, sampler, explicit_lod``
@@ -1924,7 +1927,7 @@ after lookup.
   packs them into a single register.  Only works with 2D, 2D array, cubemaps,
   and cubemaps arrays.  For 2D textures, only the addressing modes of the
   sampler and the top level of any mip pyramid are used. Set W to zero.  It
-  behaves like the SAMPLE instruction, but a filtered sample is not
+  behaves like the :opcode:`SAMPLE` instruction, but a filtered sample is not
   generated. The four samples that contribute to filtering are placed into
   xyzw in counter-clockwise order, starting with the (u,v) texture coordinate
   delta at the following locations (-, +), (+, +), (+, -), (-, -), where the
@@ -1949,7 +1952,7 @@ after lookup.
   is in dst.x, array size is in dst.y and dst.z is 0. The number of mipmaps is
   still in dst.w.  In contrast to d3d10 resinfo, there's no way in the tgsi
   instruction encoding to specify the return type (float/rcpfloat/uint), hence
-  always using uint. Also, unlike the SAMPLE instructions, the swizzle on src1
+  always using uint. Also, unlike the :opcode:`SAMPLE` instructions, the swizzle on src1
   resinfo allowing swizzling dst values is ignored (due to the interaction
   with rcpfloat modifier which requires some swizzle handling in the state
   tracker anyway).
@@ -1977,7 +1980,7 @@ Resource Access Opcodes
 
                Example: ``LOAD TEMP[0], RES[0], TEMP[1]``
 
-               Using the provided integer address, LOAD fetches data
+               Using the provided integer address, :opcode:`LOAD` fetches data
                from the specified buffer or texture without any
                filtering.
 
@@ -2001,7 +2004,7 @@ Resource Access Opcodes
 
                Example: ``STORE RES[0], TEMP[0], TEMP[1]``
 
-               Using the provided integer address, STORE writes data
+               Using the provided integer address, :opcode:`STORE` writes data
                to the specified buffer or texture.
 
                The 'address' is specified as a vector of unsigned
@@ -2046,7 +2049,7 @@ programs.
 
   Example: ``LFENCE RES[0]``
 
-  Similar to MFENCE, but it only affects the ordering of memory loads.
+  Similar to :opcode:`MFENCE`, but it only affects the ordering of memory loads.
 
 
 .. opcode:: SFENCE - Store memory fence
@@ -2055,7 +2058,7 @@ programs.
 
   Example: ``SFENCE RES[0]``
 
-  Similar to MFENCE, but it only affects the ordering of memory stores.
+  Similar to :opcode:`MFENCE`, but it only affects the ordering of memory stores.
 
 
 .. opcode:: BARRIER - Thread group barrier
@@ -2065,7 +2068,7 @@ programs.
   This opcode suspends the execution of the current thread until all
   the remaining threads in the working group reach the same point of
   the program.  Results are unspecified if any of the remaining
-  threads terminates or never reaches an executed BARRIER instruction.
+  threads terminates or never reaches an executed :opcode:`BARRIER` instruction.
 
 
 .. _atomopcodes:
-- 
1.7.3.4



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