[Mesa-dev] [WIP 05/25] i965/fs: Prepare virtual registers for double precision floats

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_fs.cpp | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index e2e942c..bec7418 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1087,9 +1087,12 @@ fs_reg::fs_reg(fs_visitor *v, const struct glsl_type *type)
    int reg_width = v->dispatch_width / 8;
 
    this->file = GRF;
-   this->reg = v->virtual_grf_alloc(v->type_size(type) * reg_width);
    this->reg_offset = 0;
    this->type = brw_type_for_base_type(type);
+
+   const int dmul = (this->type == BRW_REGISTER_TYPE_DF) ? 2 : 1;
+   this->reg = v->virtual_grf_alloc(v->type_size(type) * dmul * reg_width);
+
    this->width = v->dispatch_width;
    assert(this->width == 8 || this->width == 16);
 }
-- 
1.8.3.1