[Mesa-dev] [PATCH 2/5] i965/fs: Don't [un]spill multiple registers at a time in SIMD8 mode

Matt Turner mattst88 at gmail.com
Fri Oct 24 13:00:17 PDT 2014

On Fri, Oct 24, 2014 at 12:55 PM, Jason Ekstrand <jason at jlekstrand.net> wrote:
> On Oct 24, 2014 12:51 PM, "Matt Turner" <mattst88 at gmail.com> wrote:
>> On Fri, Oct 24, 2014 at 12:25 PM, Jason Ekstrand <jason at jlekstrand.net>
>> wrote:
>> > I thought this would be a clever way to make spilling less expensive.
>> > However, it appears that the oword read/write messages we are using for
>> > spilling ignore the execution size and assume SIMD16 whenever working
>> > with
>> > more than one register.
>> What do you mean by "assume SIMD16"?
> From reading the PRM it looks like it ignores the exec size and treats it as
> 16-wide.  Also, this makes sense given my experiments.

That sentence seems to mean something to you that it doesn't to me.
Doing the operation on 16 elements seems like the intention.

Any idea what's actually wrong? Is it using bogus high-8 channel
enable bits or something?

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