[Mesa-dev] [PATCH 4/5] i965/fs: Use correct spill offsets

[Jason Ekstrand]

On Fri, Oct 24, 2014 at 12:25 PM, Jason Ekstrand <jason at jlekstrand.net>
wrote:

> ---
>  src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 11 +++++------
>  1 file changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
> index d4b72d8..49b50ee 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
> @@ -651,7 +651,7 @@ fs_visitor::emit_unspill(bblock_t *block, fs_inst
> *inst, fs_reg dst,
>        inst->insert_before(block, unspill_inst);
>
>        dst.reg_offset += reg_size;
> -      spill_offset += reg_size * 8 * sizeof(float);
> +      spill_offset += reg_size * REG_SIZE;
>

This change is purely cosmetic


>     }
>  }
>
> @@ -671,7 +671,7 @@ fs_visitor::emit_spill(bblock_t *block, fs_inst *inst,
> fs_reg src,
>           new(mem_ctx) fs_inst(SHADER_OPCODE_GEN4_SCRATCH_WRITE,
>                                reg_null_f, src);
>        src.reg_offset += reg_size;
> -      spill_inst->offset = spill_offset + i * reg_size;
> +      spill_inst->offset = spill_offset + i * reg_size * REG_SIZE;
>

The offset is supposed to be in bytes, but we were giving it an offset in
registers.  This fixes that.


>        spill_inst->ir = inst->ir;
>        spill_inst->annotation = inst->annotation;
>        spill_inst->mlen = 1 + reg_size; /* header, value */
> @@ -759,7 +759,6 @@ fs_visitor::choose_spill_reg(struct ra_graph *g)
>  void
>  fs_visitor::spill_reg(int spill_reg)
>  {
> -   int reg_size = dispatch_width * sizeof(float);
>     int size = virtual_grf_sizes[spill_reg];
>     unsigned int spill_offset = last_scratch;
>     assert(ALIGN(spill_offset, 16) == spill_offset); /* oword read/write
> req. */
> @@ -786,7 +785,7 @@ fs_visitor::spill_reg(int spill_reg)
>        spilled_any_registers = true;
>     }
>
> -   last_scratch += size * reg_size;
> +   last_scratch += size * REG_SIZE;
>

The offset is supposed to be in bytes but virtual_grf_size is in actual
hardware registers.  Therefore, the offset is virtual_grf_size * REG_SIZE.
Before, we had an extra factor of 2 in SIMD16 mode


>
>     /* Generate spill/unspill instructions for the objects being
>      * spilled.  Right now, we spill or unspill the whole thing to a
> @@ -799,7 +798,7 @@ fs_visitor::spill_reg(int spill_reg)
>              inst->src[i].reg == spill_reg) {
>              int regs_read = inst->regs_read(this, i);
>              int subset_spill_offset = (spill_offset +
> -                                       reg_size *
> inst->src[i].reg_offset);
> +                                       REG_SIZE *
> inst->src[i].reg_offset);
>

same as above


>              fs_reg unspill_dst(GRF, virtual_grf_alloc(regs_read));
>
>              inst->src[i].reg = unspill_dst.reg;
> @@ -813,7 +812,7 @@ fs_visitor::spill_reg(int spill_reg)
>        if (inst->dst.file == GRF &&
>           inst->dst.reg == spill_reg) {
>           int subset_spill_offset = (spill_offset +
> -                                    reg_size * inst->dst.reg_offset);
> +                                    REG_SIZE * inst->dst.reg_offset);
>

same as above


>           fs_reg spill_src(GRF, virtual_grf_alloc(inst->regs_written));
>
>           inst->dst.reg = spill_src.reg;
> --
> 2.1.0
>
>
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