[Mesa-dev] [PATCH 10/10] i965/fs: Use instruction width directly for texture generation

[Matt Turner]

On Thu, Sep 4, 2014 at 10:19 PM, Jason Ekstrand <jason at jlekstrand.net> wrote:
> Signed-off-by: Jason Ekstrand <jason.ekstrand at intel.com>
> ---
>  src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 13 ++++++++++---
>  1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> index e440f93..2d2fed7 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> @@ -376,7 +376,7 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
>  {
>     int msg_type = -1;
>     int rlen = 4;
> -   uint32_t simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD8;
> +   uint32_t simd_mode;
>     uint32_t return_format;
>
>     switch (dst.type) {
> @@ -391,9 +391,16 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
>        break;
>     }
>
> -   if (dispatch_width == 16 &&
> -      !inst->force_uncompressed && !inst->force_sechalf)
> +   switch (inst->width) {
> +   case 8:
> +      simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD8;
> +      break;
> +   case 16:
>        simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD16;
> +      break;
> +   default:
> +      assert(!"Invalid width for texture instruction");

unreachable()