[Mesa-dev] [PATCH] radeonsi: Fix si_dma_copy(_tile) for compressed formats

[Michel Dänzer]

From: Michel Dänzer <michel.daenzer at amd.com>

Fixes GPUVM faults when running the piglit test "getteximage-formats
init-by-rendering" with R600_DEBUG=forcedma on SI.

Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
---
 src/gallium/drivers/radeonsi/si_dma.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_dma.c b/src/gallium/drivers/radeonsi/si_dma.c
index cd6ff4a..02899c1 100644
--- a/src/gallium/drivers/radeonsi/si_dma.c
+++ b/src/gallium/drivers/radeonsi/si_dma.c
@@ -148,7 +148,6 @@ static void si_dma_copy_tile(struct si_context *ctx,
 
 	sub_cmd = SI_DMA_COPY_TILED;
 	lbpp = util_logbase2(bpp);
-	pitch_tile_max = ((pitch / bpp) / 8) - 1;
 
 	detile = dst_mode == RADEON_SURF_MODE_LINEAR;
 	rlinear = detile ? rdst : rsrc;
@@ -165,8 +164,13 @@ static void si_dma_copy_tile(struct si_context *ctx,
 	assert(!util_format_is_depth_and_stencil(rtiled->resource.b.b.format));
 
 	array_mode = si_array_mode(rtiled->surface.level[tiled_lvl].mode);
-	slice_tile_max = (rtiled->surface.level[tiled_lvl].nblk_x *
-			  rtiled->surface.level[tiled_lvl].nblk_y) / (8*8) - 1;
+	pitch_tile_max =
+		rtiled->surface.level[tiled_lvl].nblk_x * rtiled->surface.blk_w
+		/ 8 - 1;
+	slice_tile_max =
+		rtiled->surface.level[tiled_lvl].nblk_x * rtiled->surface.blk_w
+		* rtiled->surface.level[tiled_lvl].nblk_y * rtiled->surface.blk_h
+		/ (8*8) - 1;
 	/* linear height must be the same as the slice tile max height, it's ok even
 	 * if the linear destination/source have smaller heigh as the size of the
 	 * dma packet will be using the copy_height which is always smaller or equal
@@ -216,7 +220,7 @@ static void si_dma_copy_tile(struct si_context *ctx,
 		cs->buf[cs->cdw++] = (addr >> 32UL) & 0xff;
 		copy_height -= cheight;
 		addr += cheight * pitch;
-		tiled_y += cheight;
+		tiled_y += cheight * rtiled->surface.blk_h;
 	}
 }
 
@@ -302,7 +306,7 @@ void si_dma_copy(struct pipe_context *ctx,
 		dst_offset += rdst->surface.level[dst_level].slice_size * dst_z;
 		dst_offset += dst_y * dst_pitch + dst_x * bpp;
 		si_dma_copy_buffer(sctx, dst, src, dst_offset, src_offset,
-			    src_box->height * src_pitch);
+				   copy_height * src_pitch);
 	} else {
 		si_dma_copy_tile(sctx, dst, dst_level, dst_x, dst_y, dst_z,
 				 src, src_level, src_x, src_y, src_box->z,
-- 
2.1.0