[Mesa-dev] [PATCH 1/3] i965/fs: Remove direct fs_visitor brw_wm_prog_data dependence

Anuj Phogat anuj.phogat at gmail.com
Wed Sep 17 11:46:01 PDT 2014


On Sat, Sep 6, 2014 at 1:50 PM, Jordan Justen <jordan.l.justen at intel.com> wrote:
>
> Instead we store a brw_stage_prog_data pointer, and cast it to
> brw_wm_prog_data for fragment shader specific code paths.
>
> Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
> ---
>  git://people.freedesktop.org/~jljusten/mesa for-upstream
>  No piglit regressions seen on gen7.
>
>  src/mesa/drivers/dri/i965/brw_fs.cpp         | 52 ++++++++++++++++++++--------
>  src/mesa/drivers/dri/i965/brw_fs.h           |  2 +-
>  src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 23 ++++++++----
>  3 files changed, 56 insertions(+), 21 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 2f23a9c..d976673 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -1096,6 +1096,9 @@ fs_visitor::emit_general_interpolation(ir_variable *ir)
>     reg->type = brw_type_for_base_type(ir->type->get_scalar_type());
>     fs_reg attr = *reg;
>
> +   assert(stage == MESA_SHADER_FRAGMENT);
> +   brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data;
> +
>     unsigned int array_elements;
>     const glsl_type *type;
>
> @@ -1458,12 +1461,14 @@ void
>  fs_visitor::assign_curb_setup()
>  {
>     if (dispatch_width == 8) {
> -      prog_data->base.dispatch_grf_start_reg = payload.num_regs;
> +      prog_data->dispatch_grf_start_reg = payload.num_regs;
>     } else {
> +      assert(stage == MESA_SHADER_FRAGMENT);
> +      brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data;
>        prog_data->dispatch_grf_start_reg_16 = payload.num_regs;
>     }
>
> -   prog_data->base.curb_read_length = ALIGN(stage_prog_data->nr_params, 8) / 8;
> +   prog_data->curb_read_length = ALIGN(stage_prog_data->nr_params, 8) / 8;
>
>     /* Map the offsets in the UNIFORM file to fixed HW regs. */
>     foreach_in_list(fs_inst, inst, &instructions) {
> @@ -1498,6 +1503,9 @@ fs_visitor::assign_curb_setup()
>  void
>  fs_visitor::calculate_urb_setup()
>  {
> +   assert(stage == MESA_SHADER_FRAGMENT);
> +   brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data;
> +
>     for (unsigned int i = 0; i < VARYING_SLOT_MAX; i++) {
>        prog_data->urb_setup[i] = -1;
>     }
> @@ -1583,6 +1591,9 @@ fs_visitor::calculate_urb_setup()
>  void
>  fs_visitor::assign_urb_setup()
>  {
> +   assert(stage == MESA_SHADER_FRAGMENT);
> +   brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data;
> +
>     int urb_start = payload.num_regs + prog_data->base.curb_read_length;
>
>     /* Offset all the urb_setup[] index by the actual position of the
> @@ -3036,7 +3047,9 @@ fs_visitor::setup_payload_gen6()
>  {
>     bool uses_depth =
>        (prog->InputsRead & (1 << VARYING_SLOT_POS)) != 0;
> -   unsigned barycentric_interp_modes = prog_data->barycentric_interp_modes;
> +   unsigned barycentric_interp_modes =
> +      (stage == MESA_SHADER_FRAGMENT) ?
> +      ((brw_wm_prog_data*) this->prog_data)->barycentric_interp_modes : 0;
>
>     assert(brw->gen >= 6);
>
> @@ -3080,11 +3093,14 @@ fs_visitor::setup_payload_gen6()
>        }
>     }
>
> -   prog_data->uses_pos_offset = key->compute_pos_offset;
> -   /* R31: MSAA position offsets. */
> -   if (prog_data->uses_pos_offset) {
> -      payload.sample_pos_reg = payload.num_regs;
> -      payload.num_regs++;
> +   if (stage == MESA_SHADER_FRAGMENT) {
> +      brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data;
> +      prog_data->uses_pos_offset = key->compute_pos_offset;
> +      /* R31: MSAA position offsets. */
> +      if (prog_data->uses_pos_offset) {
> +         payload.sample_pos_reg = payload.num_regs;
> +         payload.num_regs++;
> +      }
>     }
>
>     /* R32: MSAA input coverage mask */
> @@ -3109,6 +3125,8 @@ fs_visitor::setup_payload_gen6()
>  void
>  fs_visitor::assign_binding_table_offsets()
>  {
> +   assert(stage == MESA_SHADER_FRAGMENT);
> +   brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data;
>     uint32_t next_binding_table_offset = 0;
>
>     /* If there are no color regions, we still perform an FB write to a null
> @@ -3195,7 +3213,10 @@ fs_visitor::run()
>        /* We handle discards by keeping track of the still-live pixels in f0.1.
>         * Initialize it with the dispatched pixels.
>         */
> -      if (prog_data->uses_kill || key->alpha_test_func) {
> +      bool uses_kill =
> +         (stage == MESA_SHADER_FRAGMENT) &&
> +         ((brw_wm_prog_data*) this->prog_data)->uses_kill;
> +      if (uses_kill || key->alpha_test_func) {
>           fs_inst *discard_init = emit(FS_OPCODE_MOV_DISPATCH_TO_FLAGS);
>           discard_init->flag_subreg = 1;
>        }
> @@ -3349,16 +3370,19 @@ fs_visitor::run()
>        schedule_instructions(SCHEDULE_POST);
>
>     if (last_scratch > 0) {
> -      prog_data->base.total_scratch = brw_get_scratch_size(last_scratch);
> +      prog_data->total_scratch = brw_get_scratch_size(last_scratch);
>     }
>
>     if (brw->use_rep_send)
>        try_rep_send();
>
> -   if (dispatch_width == 8)
> -      prog_data->reg_blocks = brw_register_blocks(grf_used);
> -   else
> -      prog_data->reg_blocks_16 = brw_register_blocks(grf_used);
> +   if (stage == MESA_SHADER_FRAGMENT) {
> +      brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data;
> +      if (dispatch_width == 8)
> +         prog_data->reg_blocks = brw_register_blocks(grf_used);
> +      else
> +         prog_data->reg_blocks_16 = brw_register_blocks(grf_used);
> +   }
>
>     /* If any state parameters were appended, then ParameterValues could have
>      * been realloced, in which case the driver uniform storage set up by
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
> index d40a2e3..7f43594 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -470,7 +470,7 @@ public:
>     void visit_atomic_counter_intrinsic(ir_call *ir);
>
>     const struct brw_wm_prog_key *const key;
> -   struct brw_wm_prog_data *prog_data;
> +   struct brw_stage_prog_data *prog_data;
>     unsigned int sanity_param_count;
>
>     int *param_size;
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> index 2a097f6..3d9ec57 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> @@ -930,7 +930,7 @@ fs_visitor::visit(ir_expression *ir)
>           /* Assume this may touch any UBO. It would be nice to provide
>            * a tighter bound, but the array information is already lowered away.
>            */
> -         brw_mark_surface_used(&prog_data->base,
> +         brw_mark_surface_used(prog_data,
>                                 stage_prog_data->binding_table.ubo_start +
>                                 shader_prog->NumUniformBlocks - 1);
>        }
> @@ -1830,7 +1830,7 @@ fs_visitor::visit(ir_texture *ir)
>           max_used += stage_prog_data->binding_table.texture_start;
>        }
>
> -      brw_mark_surface_used(&prog_data->base, max_used);
> +      brw_mark_surface_used(prog_data, max_used);
>
>        /* Emit code to evaluate the actual indexing expression */
>        nonconst_sampler_index->accept(this);
> @@ -2683,6 +2683,9 @@ fs_visitor::emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
>                                  fs_reg dst, fs_reg offset, fs_reg src0,
>                                  fs_reg src1)
>  {
> +   bool uses_kill =
> +      (stage == MESA_SHADER_FRAGMENT) &&
> +      ((brw_wm_prog_data*) this->prog_data)->uses_kill;
>     const unsigned operand_len = dispatch_width / 8;
>     unsigned mlen = 0;
>     fs_inst *inst;
> @@ -2691,7 +2694,7 @@ fs_visitor::emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
>     emit(MOV(brw_uvec_mrf(8, mlen, 0), fs_reg(0u)))
>        ->force_writemask_all = true;
>
> -   if (prog_data->uses_kill) {
> +   if (uses_kill) {
>        emit(MOV(brw_uvec_mrf(1, mlen, 7), brw_flag_reg(0, 1)))
>           ->force_writemask_all = true;
>     } else {
> @@ -2728,6 +2731,9 @@ void
>  fs_visitor::emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
>                                        fs_reg offset)
>  {
> +   bool uses_kill =
> +      (stage == MESA_SHADER_FRAGMENT) &&
> +      ((brw_wm_prog_data*) this->prog_data)->uses_kill;
>     const unsigned operand_len = dispatch_width / 8;
>     unsigned mlen = 0;
>     fs_inst *inst;
> @@ -2736,7 +2742,7 @@ fs_visitor::emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
>     emit(MOV(brw_uvec_mrf(8, mlen, 0), fs_reg(0u)))
>        ->force_writemask_all = true;
>
> -   if (prog_data->uses_kill) {
> +   if (uses_kill) {
>        emit(MOV(brw_uvec_mrf(1, mlen, 7), brw_flag_reg(0, 1)))
>           ->force_writemask_all = true;
>     } else {
> @@ -2807,6 +2813,8 @@ fs_visitor::emit_dummy_fs()
>  struct brw_reg
>  fs_visitor::interp_reg(int location, int channel)
>  {
> +   assert(stage == MESA_SHADER_FRAGMENT);
> +   brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data;
>     int regnr = prog_data->urb_setup[location] * 2 + channel / 2;
>     int stride = (channel & 1) * 4;
>
> @@ -3030,6 +3038,9 @@ fs_visitor::emit_alpha_test()
>  void
>  fs_visitor::emit_fb_writes()
>  {
> +   assert(stage == MESA_SHADER_FRAGMENT);
> +   brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data;
> +
>     this->current_annotation = "FB write header";
>     bool header_present = true;
>     /* We can potentially have a message length of up to 15, so we have to set
> @@ -3054,7 +3065,7 @@ fs_visitor::emit_fb_writes()
>      *      thread message and on all dual-source messages."
>      */
>     if (brw->gen >= 6 &&
> -       (brw->is_haswell || brw->gen >= 8 || !this->prog_data->uses_kill) &&
> +       (brw->is_haswell || brw->gen >= 8 || !prog_data->uses_kill) &&
>         !do_dual_src &&
>         key->nr_color_regions == 1) {
>        header_present = false;
> @@ -3264,7 +3275,7 @@ fs_visitor::fs_visitor(struct brw_context *brw,
>                         unsigned dispatch_width)
>     : backend_visitor(brw, shader_prog, &fp->Base, &prog_data->base,
>                       MESA_SHADER_FRAGMENT),
> -     key(key), prog_data(prog_data),
> +     key(key), prog_data(&prog_data->base),
>       dispatch_width(dispatch_width)
>  {
>     this->mem_ctx = mem_ctx;
> --
> 2.1.0
>
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> mesa-dev at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Series is:
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>


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