[Mesa-dev] [PATCH 1/3] radeon/winsys: always send the INFO chunk

[Christian König]

From: Christian König <christian.koenig at amd.com>

Old kernels that don't know the chunk should simply ignore it.

Signed-off-by: Christian König <christian.koenig at amd.com>
---
 src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 14 ++------------
 1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index ecf8957..0aa54c2 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -115,6 +115,7 @@ static boolean radeon_init_cs_context(struct radeon_cs_context *csc,
     csc->chunk_array[2] = (uint64_t)(uintptr_t)&csc->chunks[2];
 
     csc->cs.chunks = (uint64_t)(uintptr_t)csc->chunk_array;
+    csc->cs.num_chunks = 3;
 
     for (i = 0; i < Elements(csc->reloc_indices_hashlist); i++) {
         csc->reloc_indices_hashlist[i] = -1;
@@ -498,48 +499,37 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs,
             p_atomic_inc(&cs->cst->relocs_bo[i]->num_active_ioctls);
         }
 
+        cs->cst->flags[0] = 0;
         switch (cs->base.ring_type) {
         case RING_DMA:
-            cs->cst->flags[0] = 0;
             cs->cst->flags[1] = RADEON_CS_RING_DMA;
-            cs->cst->cs.num_chunks = 3;
             if (cs->ws->info.r600_virtual_address) {
                 cs->cst->flags[0] |= RADEON_CS_USE_VM;
             }
             break;
 
         case RING_UVD:
-            cs->cst->flags[0] = 0;
             cs->cst->flags[1] = RADEON_CS_RING_UVD;
-            cs->cst->cs.num_chunks = 3;
             break;
 
         case RING_VCE:
-            cs->cst->flags[0] = 0;
             cs->cst->flags[1] = RADEON_CS_RING_VCE;
-            cs->cst->cs.num_chunks = 3;
             break;
 
         default:
         case RING_GFX:
-            cs->cst->flags[0] = 0;
             cs->cst->flags[1] = RADEON_CS_RING_GFX;
-            cs->cst->cs.num_chunks = 2;
             if (flags & RADEON_FLUSH_KEEP_TILING_FLAGS) {
                 cs->cst->flags[0] |= RADEON_CS_KEEP_TILING_FLAGS;
-                cs->cst->cs.num_chunks = 3;
             }
             if (cs->ws->info.r600_virtual_address) {
                 cs->cst->flags[0] |= RADEON_CS_USE_VM;
-                cs->cst->cs.num_chunks = 3;
             }
             if (flags & RADEON_FLUSH_END_OF_FRAME) {
                 cs->cst->flags[0] |= RADEON_CS_END_OF_FRAME;
-                cs->cst->cs.num_chunks = 3;
             }
             if (flags & RADEON_FLUSH_COMPUTE) {
                 cs->cst->flags[1] = RADEON_CS_RING_COMPUTE;
-                cs->cst->cs.num_chunks = 3;
             }
             break;
         }
-- 
1.9.1